XF652 Enhanced Clock Generator for 2 DIMM Systems Preliminary FREQUENCY TABLE (MHz) PRODUCT FEATURES SELECTORS n Supports Pentium, Pentium II, Pentium-Pro, AMD and Cyrix CPUs. n Supports Intel chipset requirements. n Supports Sychronous DRAM designs n 4 host (CPU/AGP) clocks & 8 SDRAM clocks. n Optional common or mixed supply mode : n (VDD = VDD3 = VDD4 = VDD2 = 3.3V) (VDD = VDD3 = VDD4 = 3.3V, VDD2 = 2.5V) < 250 pS skew on CPU buffers n < 250 pS skew on PCI buffers n Supports Single Pin Power Management. n F.A.S.T. (Frequency Augmentation System Test) Function for board performance testing. n OUTPUTS (MHz) FCT1 FCT0 S1 S0 CPUCLK PCICLK 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 TEST 73.38 83.3 69.80 57.27 76.96 62.64 50.11 83.3 75 61.57 68.01 55 75 60 66.8 TEST 36.9 a.32 34.90 28.63 38.48 31.32 25.05 41.76 a.32 30.78 34.01 27.50 37.50 30.00 33.30 .A.32 = Asynchronous 32 MHz. 48 Pin SSOP package for minimum board space CONNECTION DIAGRAM BLOCK DIAGRAM OSCin B REF(1:3) 3 REF OSCout IOAPIC Vdd2 S1 S0 FCT0 B PLL1 B 4 8 FCT1 CPUCLK(1:4) SDRAM (1:8) PCICLK_F dly B 6 PCICLK(1:6) PWR_DWN# PLL2 24 MHz 48 MHz INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 REF2 REF1 Vss OSCin OSCout FCT1 Vdd4 PCICLK_F PCICLK1 Vss PCICLK2 PCICLK3 PCICLK4 PCICLK5 Vdd4 PCICLK6 Vss S0 S1 FCT0 Vdd4 48 MHz 24 Mhz Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 Rev.1.3 Vdd REF3 Vdd2 IOAPIC PWR_DWN# Vss CPUCLK1 CPUCLK2 Vdd2 CPUCLK3 CPUCLK4 Vss SDRAM1 SDRAM2 Vdd3 SDRAM3 SDRAM4 Vss SDRAM5 SDRAM6 Vdd3 SDRAM7 SDRAM8 Vdd 5/6/97 Page 1 of 7 XF652 Enhanced Clock Generator for 2 DIMM Systems Preliminary PIN DESCRIPTION PIN No. Pin Name Power I/O TYPE Description 4 OSCin Vdd I OSC1 5 OSCout Vdd4 O OSC1 18, 19, 6, 20 42, 41, 39, 38 36, 35, 33, 32, 30, 29, 27, 26 S(0:1), FCT(0:1) CPUCLK(1:4) - I Vdd2 O Internal Pull-Up Type1 On-chip reference oscillator input pin. Requires either an external parallel resonant crystal (nominally 14.318 MHz) or externally generated reference signal On chip reference oscillator output pin. Drives an external parallel resonant crystal. When an externally generated reference signal is used, this pin is left unconnected Frequency select input pins. See page 1 for frequency selection. SDRAM(1:8) Vdd3 O Type4 43, 37, 31, 24, 17, 10. 3 48, 25 46, 40 34, 28 21, 15, 7 23 22 2, 1, 47 9, 11, 12, 13, 14, 16 8 45 GND - P Clock outputs. CPU frequency table specified. Power is applied by Vdd2 pin. Synchronous Dynamic RAM clocks. These may be disabled (in groups of 2) by programming (with a resistor) the lower numbered clock to ground with a 20 K resistor. See output buffer disable table. Ground pins for the device. Vdd Vdd2 Vdd3 Vdd4 24MHz 48MHZ REF(1:3) PCICLK(1:6) Vdd4 Vdd4 Vdd Vdd P P P Power supply pins for analog circuit , Fixed clocks and core logic Power supply pins for 2.5V/3.3V CPU buffers. Power supply pins for 3.3V PCI and SDRAM buffers. O O O O Type3 Type3 Type4 Type5 Frequency output for super I/O Frequency output for USB. Buffered output of on-chip 14.31818 Mhz reference oscillator. PCI clock outputs. See frequency table PCICLK_F IOAPIC Vdd Vdd2 O O Type5 Type2 44 PWR_DWN# - I Internal Pull-Up PCI clock outputs. See frequency table. - Buffered output of 14.3MHZ for multiprocessor support. It is powered by Vdd2 Power down, turns off power to entire IC, including VCO. INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Rev.1.3 5/6/97 Page 2 of 7 XF652 Enhanced Clock Generator for 2 DIMM Systems Preliminary POWER MANAGEMENT FUNCTION The device clocks may be disabled using the PWR_DWN# pin in order to reduce power consumption. All clocks are stopped in the low state. All clocks maintain a valid high period on transitions from running to stopped. When powered down, the reference oscillator and VCOs are stopped. On low to high transitions of PWR_DWN#, external circuitry should allow 2 mS for the VCOs to stabilize prior to assuming that the pulse widths are correct. MAXIMUM RATINGS This device contains circuitry to protect the inputs against damage due to high static voltages or electric Voltage Relative to VSS: -0.3V field; however, precautions should be taken to avoid Voltage Relative to VDD: 0.3V application of any voltage higher than the maximum Storage Temperature: -65C to + 150C rated voltages to this circuit. For proper operation, Vin Ambient Temperature: -55C to +125C and Vout should be constrained to the range: Maximum Power Supply: 7V VSS<(Vin or Vout)<VDD Unused inputs must always be tied to an appropriate logic voltage level (either VSS or VDD). SWITCHING CHARACTERISTICS Characteristic Min Typ Max Units - 45 50 55 % Measured at 1.5V CPU to PCI Offset tOFF 1 - 4 ns 15 pf Load Measured at 1.5V Skew (CPU-CPU) tSKEW 1 - - 250 ps 15 pf Load Measured at 1.5V Skew (CPu-SDRAM) tSKEW 2 - - 500 ps 15 pf Load Measured at 1.5V Skew (PCI-PCI) tSKEW 3 - - 250 ps 15 pf Load Measured at 1.5V Period Adjacent Cycles P - - +250 ps - Jitter Spectrum 20 dB Bandwidth from Center BWJ 500 KHz Output Duty Cycle Symbol Conditions VDD = VDD3 =3.3V 5%, VDD2 = 2.375V to 2.9V, TA = 0C to +70C note 1: Ring Back must not enter this range. INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Rev.1.3 5/6/97 Page 3 of 7 XF652 Enhanced Clock Generator for 2 DIMM Systems Preliminary TYPE 1 BUFFER CHARACTERISTICS FOR CPUCLK(1:4) Characteristic Symbol Min Typ Max Units Conditions Pull-Up Current Min IOHmin -49 - - mA Vout = 1.0 V Pull-Up Current Max IOHmax - - -19 mA Vout = 2.5 V Pull-Down Current Min IOLmin 48 - - mA Vout = 1.2 V Pull-Down Current Max IOLmax - - 41 mA Vout = 0.3 V Rise Time Between 0.4 V and 2.0 V TR 0.4 - 1.6 nS 20 pF Load Fall Time Between 0.4 V and 2.0 V TF 0.4 - 1.6 nS 20 pF Load VDD = VDD3 =3.3V 5%, VDD2 = 2.5V +/-5%, TA = 0C to +70C TYPE 2 BUFFER CHARACTERISTICS FOR IOAPIC Characteristic Symbol Min Typ Max Units Conditions Pull-Up Current Min IOHmin -36 - - mA Vout = 1.4 V Pull-Up Current Max IOHmax - - -29 mA Vout = 2.7 V Pull-Down Current Min IOLmin 36 - - mA Vout = 1.0 V Pull-Down Current Max IOLmax - - 28 mA Vout = 0.2 V Rise Time Between 0.4 V and 2.0 V TR 0.4 - 1.6 nS 20 pF Load Fall Time Between 0.4 V and 2.0 V TF 0,4 - 1.6 nS 20 pF Load VDD = VDD3 =3.3V 5%, VDD2 = 2.5V +/-5%, TA = 0C to +70C TYPE 3 BUFFER CHARACTERISTICS FOR REF(2:3) and 48/24 MHz Characteristic Symbol Min Typ Max Units Conditions Pull-Up Current Min IOHmin -29 - - mA Vout = 1.0 V Pull-Up Current Max IOHmax - - -23 mA Vout = 3.135 V Pull-Down Current Min IOLmin 29 - - mA Vout = 1.95 V Pull-Down Current Max IOLmax - - TBD mA Vout = 0.4 V Rise Time Between 0.4 V and 2.4 V TR 1.0 - 4.0 nS 20 pF Load Fall Time Between 0.4 V and 2.4 V TF 1.0 - 4.0 nS 20 pF Load VDD = VDD3 =3.3V 5%, VDD2 = 2.5V +/-5%, TA = 0C to +70C INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Rev.1.3 5/6/97 Page 4 of 7 XF652 Enhanced Clock Generator for 2 DIMM Systems Preliminary TYPE 4 BUFFER CHARACTERISTICS FOR REF1, SDRAM(1:8) Characteristic Symbol Min Typ Max Units Pull-Up Current Min IOHmin -54 - - mA Vout = 2.0 V Pull-Up Current Max IOHmax - - -46 mA Vout = 3.135 V Pull-Down Current Min IOLmin 54 - - mA Vout = 1.0 V Pull-Down Current Max IOLmax - - 53 mA Vout = 0.4 V Rise Time Between 0.4 V and 2.4 V TR 0.5 - 2.0 nS 45 pF Load, REF1 Fall Time Between 0.4 V and 2.4 V TF 0.5 - 2.0 nS 45 pF Load, REF1 Rise Time Between 0.4 V and 2.4 V TR 0.5 - 1.3 nS 30 pF Load, SDRAM(1:8) Fall Time Between 0.4 V and 2.4 V TF 0.5 - 1.3 nS 30 pF Load, SDRAM(1:8) VDD = VDD3 =3.3V 5%, VDD2 =2.5V +/-5%, Conditions TA = 0C to +70C TYPE 5 BUFFER CHARACTERISTICS FOR PCICLK(1:6,F) Characteristic Symbol Min Typ Max Units Pull-Up Current Min IOHmin -33 Pull-Up Current Max IOHmax - Pull-Down Current Min IOLmin Pull-Down Current Max Conditions - - mA Vout = 1.0 V - -33 mA Vout = 3.135 V 30 - - mA Vout = 1.95 V IOLmax - - 38 mA Vout = 0.4 V RiseTime Between 0.4 V and 2.4 V TR 0.5 - 2.0 nS 30 pF Load Fall Time Between 0.4 V and 2.4 V TF 0.5 - 2.0 nS 30 pF Load VDD = VDD3 =3.3V 5%, VDD2 = 2.5V +/-5%,, TA = 0C to +70C INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Rev.1.3 5/6/97 Page 5 of 7 XF652 Enhanced Clock Generator for 2 DIMM Systems Preliminary PCB LAYOUT RECOMMENDATION Via to GND plane Via to VDD Island Via to VCC plane VCC3.3V IMIXF652 FB1 C3 22F C4 C5 C6 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 C12 VCC2.5V C11 FB1 C10 C13 22F C9 C8 C7 This is only a layout recommendation for best performance and lower EMI. The designer may choose a differnent approach but C4, C5, C6, C7, C8, C9, C10, C11and C12 (all are 0.1f) should always be used and placed close to their VDD pins. INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Rev.1.3 5/6/97 Page 6 of 7 XF652 Enhanced Clock Generator for 2 DIMM Systems Preliminary PACKAGE DRAWING AND DIMENSIONS 48 PIN SSOP OUTLINE DIMENSIONS INCHES C SYMBOL L H E D a A2 NOM MAX MIN NOM MAX 0.095 0.102 0.110 2.41 2.59 2.79 A1 0.008 0.012 0.016 0.20 0.31 0.41 A2 0.088 0.090 0.092 2.24 2.29 2.34 B 0.008 0.010 0.0135 0.203 0.254 0.343 C 0.005 - 0.010 0.127 - 0.254 D 0.620 0.625 0.630 15.75 15.88 16.00 E 0.292 0.296 0.299 7.42 7.52 7.59 e A A1 B A e MILLIMETERS MIN 0.025 BSC 0.635 BSC H 0.400 0.406 0.410 10.16 10.31 10.41 a 0.10 0.013 0.016 0.25 0.33 0.41 L 0.024 0.032 0.040 0.61 0.81 1.02 a 0 5 8 0 5 8 X 0.085 0.093 0.100 2.16 2.36 2.54 ORDERING INFORMATION Part Number Package Type IMIXF652AYB 48 PIN SSOP Note: Production Flow Commercial, 0C to +70C The ordering part number is formed by a combination of device number, device revision, package style, and screening as shown below. IMIXF652AYB Flow B = Commercial, 0C to + 70C Package Y = SSOP Revision IMI Device Number INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Rev.1.3 5/6/97 Page 7 of 7