XF652
Enhanced Clock Generator for 2 DIMM Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. Rev.1.3 5/6/97
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Page 1 of 7
PRODUCT FEATURES
n Supports Pentium, Pentium II, Pentium-Pro,
AMD and Cyrix CPUs.
n Supports Intel chipset requirements.
n Supports Sychronous DRAM designs
n 4 host (CPU/AGP) clocks & 8 SDRAM clocks.
n Optional common or mixed supply mode :
(VDD = VDD3 = VDD4 = VDD2 = 3.3V)
(VDD = VDD3 = VDD4 = 3.3V, VDD2 = 2.5V)
n < 250 pS skew on CPU buffers
n < 250 pS skew on PCI buffers
n Supports Single Pin Power Management.
n F.A.S.T. (Frequency Augmentation System Test)
Function for board performance testing.
n 48 Pin SSOP package for minimum board space
BLOCK DIAGRAM
FREQUENCY TABLE (MHz)
SELECTORS OUTPUTS (MHz)
FCT1 FCT0 S1 S0 CPUCLK PCICLK
0000TEST TEST
000173.38 36.9
0010 83.3 a.32
001169.80 34.90
010057.27 28.63
010176.96 38.48
011062.64 31.32
011150.11 25.05
1000 83.3 41.76
1 0 0 1 75 a.32
101061.57 30.78
101168.01 34.01
1 1 0 0 55 27.50
1 1 0 1 75 37.50
1 1 1 0 60 30.00
1111 66.8 33.30
.A.32 = Asynchronous 32 MHz.
CONNECTION DIAGRAM
REF2
1
REF1
2
Vss
3
OSCin
4
Vss
17
S0
18
S1
19
FCT0
20
OSCout
5
FCT1
6
Vdd4
7
PCICLK_F
8
PCICLK1
9
Vss
10
PCICLK2
11
PCICLK3
12
PCICLK4
13
PCICLK5
14
Vdd4
15
PCICLK6
16
Vdd4
21
48 MHz
22
24 Mhz
23
Vss
24
Vdd
48
REF3
47
Vdd2
46
IOAPIC
45
PWR_DWN#
44
Vss
43
CPUCLK1
42
CPUCLK2
41
Vdd2
40
CPUCLK3
39
CPUCLK4
38
Vss
37
SDRAM1
36
SDRAM2
35
Vdd3
34
SDRAM3
33
SDRAM4
32
Vss
31
SDRAM5
30
SDRAM6
29
Vdd3
28
SDRAM7
27
SDRAM8
26
Vdd
25
REF
OSCin
OSCout
REF(1:3)
PLL2
24 MHz
48 MHz
PLL1
PCICLK(1:6)
6
dly
CPUCLK(1:4)
4
SDRAM (1:8)
8
Vdd2
IOAPIC
3
FCT0
S1
FCT1 PCICLK_F
S0
PWR_DWN#
XF652
Enhanced Clock Generator for 2 DIMM Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. Rev.1.3 5/6/97
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Page 2 of 7
PIN DESCRIPTION
PIN No. Pin Name Power I/O TYPE Description
4OSCin Vdd IOSC1 On-chip reference oscillator input pin. Requires either an
external parallel resonant crystal (nominally 14.318 MHz) or
externally generated reference signal
5OSCout Vdd4 OOSC1 On chip reference oscillator output pin. Drives an external
parallel resonant crystal. When an externally generated
reference signal is used, this pin is left unconnected
18, 19, 6,
20 S(0:1),
FCT(0:1) -IInternal
Pull-Up Frequency select input pins. See page 1 for frequency selection.
42, 41, 39,
38 CPUCLK(1:4) Vdd2 OType1 Clock outputs. CPU frequency table specified. Power is applied
by Vdd2 pin.
36, 35, 33,
32, 30, 29,
27, 26
SDRAM(1:8) Vdd3 OType4 Synchronous Dynamic RAM clocks. These may be disabled (in
groups of 2) by programming (with a resistor) the lower
numbered clock to ground with a 20 K resistor. See output buffer
disable table.
43, 37, 31,
24, 17, 10.
3
GND -P Ground pins for the device.
48, 25 Vdd -PPower supply pins for analog circuit , Fixed clocks and core logic
46, 40 Vdd2 -PPower supply pins for 2.5V/3.3V CPU buffers.
34, 28 Vdd3 -PPower supply pins for 3.3V PCI and SDRAM buffers.
21, 15, 7 Vdd4 -
23 24MHz Vdd4 OType3 Frequency output for super I/O
22 48MHZ Vdd4 OType3 Frequency output for USB.
2, 1, 47 REF(1:3) Vdd OType4 Buffered output of on-chip 14.31818 Mhz reference oscillator.
9, 11, 12,
13, 14, 16 PCICLK(1:6) Vdd OType5 PCI clock outputs. See frequency table
8PCICLK_F Vdd OType5 PCI clock outputs. See frequency table.
45 IOAPIC Vdd2 OType2 - Buffered output of 14.3MHZ for multiprocessor support. It is
powered by Vdd2
44 PWR_DWN# -IInternal
Pull-Up Power down, turns off power to entire IC, including VCO.
XF652
Enhanced Clock Generator for 2 DIMM Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. Rev.1.3 5/6/97
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Page 3 of 7
POWER MANAGEMENT FUNCTION
The device clocks may be disabled using the PWR_DWN# pin in order to reduce power consumption. All clocks are
stopped in the low state. All clocks maintain a valid high period on transitions from running to stopped. When powered
down, the reference oscillator and VCOs are stopped. On low to high transitions of PWR_DWN#, external circuitry
should allow 2 mS for the VCOs to stabilize prior to assuming that the pulse widths are correct.
MAXIMUM RATINGS
Voltage Relative to VSS: -0.3V
Voltage Relative to VDD: 0.3V
Storage Temperature: -65ºC to + 150ºC
Ambient Temperature: -55ºC to +125ºC
Maximum Power Supply: 7V
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
field; however, precautions should be taken to avoid
application of any voltage higher than the maximum
rated voltages to this circuit. For proper operation, Vin
and Vout should be constrained to the range:
VSS<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate
logic voltage level (either VSS or VDD).
SWITCHING CHARACTERISTICS
Characteristic Symbol Min Typ Max Units Conditions
Output Duty Cycle -45 50 55 %Measured at 1.5V
CPU to PCI Offset tOFF 1-4ns 15 pf Load Measured at 1.5V
Skew (CPU-CPU) tSKEW1- - 250 ps 15 pf Load Measured at 1.5V
Skew (CPu-SDRAM) tSKEW2- - 500 ps 15 pf Load Measured at 1.5V
Skew (PCI-PCI) tSKEW3- - 250 ps 15 pf Load Measured at 1.5V
Period Adjacent Cycles P- - +250 ps -
Jitter Spectrum 20 dB
Bandwidth from Center BWJ500 KHz
VDD = VDD3 =3.3V ±5%, VDD2 = 2.375V to 2.9V, TA = 0ºC to +70ºC
note 1: Ring Back must not enter this range.
XF652
Enhanced Clock Generator for 2 DIMM Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. Rev.1.3 5/6/97
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Page 4 of 7
TYPE 1 BUFFER CHARACTERISTICS FOR CPUCLK(1:4)
Characteristic Symbol Min Typ Max Units Conditions
Pull-Up Current Min IOHmin -49 - - mA Vout = 1.0 V
Pull-Up Current Max IOHmax - - -19 mA Vout = 2.5 V
Pull-Down Current Min IOLmin 48 - - mA Vout = 1.2 V
Pull-Down Current Max IOLmax - - 41 mA Vout = 0.3 V
Rise Time
Between 0.4 V and 2.0 V TR 0.4 -1.6 nS 20 pF Load
Fall Time
Between 0.4 V and 2.0 V TF 0.4 -1.6 nS 20 pF Load
VDD = VDD3 =3.3V ±5%, VDD2 = 2.5V +/-5%, TA = 0ºC to +70ºC
TYPE 2 BUFFER CHARACTERISTICS FOR IOAPIC
Characteristic Symbol Min Typ Max Units Conditions
Pull-Up Current Min IOHmin -36 - - mA Vout = 1.4 V
Pull-Up Current Max IOHmax - - -29 mA Vout = 2.7 V
Pull-Down Current Min IOLmin 36 - - mA Vout = 1.0 V
Pull-Down Current Max IOLmax - - 28 mA Vout = 0.2 V
Rise Time
Between 0.4 V and 2.0 V TR 0.4 -1.6 nS 20 pF Load
Fall Time
Between 0.4 V and 2.0 V TF 0,4 -1.6 nS 20 pF Load
VDD = VDD3 =3.3V ±5%, VDD2 = 2.5V +/-5%, TA = 0ºC to +70ºC
TYPE 3 BUFFER CHARACTERISTICS FOR REF(2:3) and 48/24 MHz
Characteristic Symbol Min Typ Max Units Conditions
Pull-Up Current Min IOHmin -29 - - mA Vout = 1.0 V
Pull-Up Current Max IOHmax - - -23 mA Vout = 3.135 V
Pull-Down Current Min IOLmin 29 - - mA Vout = 1.95 V
Pull-Down Current Max IOLmax - - TBD mA Vout = 0.4 V
Rise Time
Between 0.4 V and 2.4 V TR 1.0 -4.0 nS 20 pF Load
Fall Time
Between 0.4 V and 2.4 V TF 1.0 -4.0 nS 20 pF Load
VDD = VDD3 =3.3V ±5%, VDD2 = 2.5V +/-5%, TA = 0ºC to +70ºC
XF652
Enhanced Clock Generator for 2 DIMM Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. Rev.1.3 5/6/97
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Page 5 of 7
TYPE 4 BUFFER CHARACTERISTICS FOR REF1, SDRAM(1:8)
Characteristic Symbol Min Typ Max Units Conditions
Pull-Up Current Min IOHmin -54 - - mA Vout = 2.0 V
Pull-Up Current Max IOHmax - - -46 mA Vout = 3.135 V
Pull-Down Current Min IOLmin 54 - - mA Vout = 1.0 V
Pull-Down Current Max IOLmax - - 53 mA Vout = 0.4 V
Rise Time
Between 0.4 V and 2.4 V TR 0.5 -2.0 nS 45 pF Load, REF1
Fall Time
Between 0.4 V and 2.4 V TF 0.5 -2.0 nS 45 pF Load, REF1
Rise Time
Between 0.4 V and 2.4 V TR 0.5 -1.3 nS 30 pF Load, SDRAM(1:8)
Fall Time
Between 0.4 V and 2.4 V TF 0.5 -1.3 nS 30 pF Load, SDRAM(1:8)
VDD = VDD3 =3.3V ±5%, VDD2 =2.5V +/-5%, TA = 0ºC to +70ºC
TYPE 5 BUFFER CHARACTERISTICS FOR PCICLK(1:6,F)
Characteristic Symbol Min Typ Max Units Conditions
Pull-Up Current Min IOHmin -33 - - mA Vout = 1.0 V
Pull-Up Current Max IOHmax - - -33 mA Vout = 3.135 V
Pull-Down Current Min IOLmin 30 - - mA Vout = 1.95 V
Pull-Down Current Max IOLmax - - 38 mA Vout = 0.4 V
RiseTime
Between 0.4 V and 2.4 V TR 0.5 -2.0 nS 30 pF Load
Fall Time
Between 0.4 V and 2.4 V TF 0.5 -2.0 nS 30 pF Load
VDD = VDD3 =3.3V ±5%, VDD2 = 2.5V +/-5%,, TA = 0ºC to +70ºC
XF652
Enhanced Clock Generator for 2 DIMM Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. Rev.1.3 5/6/97
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Page 6 of 7
PCB LAYOUT RECOMMENDATION
This is only a layout recommendation for best performance and lower EMI. The designer may choose a differnent approach but
C4, C5, C6, C7, C8, C9, C10, C11and C12 (all are 0.1µf) should always be used and placed close to their VDD pins.
Via to VCC plane
Via to VDD Island Via to GND plane
22µF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
C12
C11
C10
C9
C8
C7
C6
C5
C4
IMIXF652
VCC
3.3V
FB1
VCC
2.5V
FB1
22µF
C3
C13
XF652
Enhanced Clock Generator for 2 DIMM Systems
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. Rev.1.3 5/6/97
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571 Page 7 of 7
PACKAGE DRAWING AND DIMENSIONS
48 PIN SSOP OUTLINE DIMENSIONS
INCHES MILLIMETERS
SYMBOL MIN NOM MAX MIN NOM MAX
A0.095 0.102 0.110 2.41 2.59 2.79
A10.008 0.012 0.016 0.20 0.31 0.41
A2 0.088 0.090 0.092 2.24 2.29 2.34
B0.008 0.010 0.0135 0.203 0.254 0.343
C0.005 -0.010 0.127 -0.254
D0.620 0.625 0.630 15.75 15.88 16.00
E0.292 0.296 0.299 7.42 7.52 7.59
e0.025 BSC 0.635 BSC
H0.400 0.406 0.410 10.16 10.31 10.41
a0.10 0.013 0.016 0.25 0.33 0.41
L0.024 0.032 0.040 0.61 0.81 1.02
a
X0.085 0.093 0.100 2.16 2.36 2.54
ORDERING INFORMATION
Part Number Package Type Production Flow
IMIXF652AYB 48 PIN SSOP Commercial, 0ºC to +70ºC
Note: The ordering part number is formed by a combination of device number, device revision, package style, and
screening as shown below.
IMIXF652AYB Flow
B = Commercial, 0ºC to + 70ºC
Package
Y = SSOP
Revision
IMI Device Number
Be
A
A1
A2
E
H
a
L
C
D