1. Product profile
1.1 General description
Standard level N-channel MOSFET in DFN3333-8 package qualified to 150 °C. This
product is designed and qualified for use in a wide range of industrial, communications
and power supply equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Small footprint for compact designs
Suitable for standard level gate drive
sources
1.3 Applications
DC-to-DC converters
Lithium-ion batt er y pro te ct ion
Load switching
1.4 Quick reference data
PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
Rev. 3 — 12 December 2011 Product data sheet
DFN3333-8
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage Tj25 °C; Tj150 °C - - 100 V
IDdrain current Tmb =2C; V
GS = 10 V; see Figure 1 --27A
Ptot total power dissipation Tmb = 25 °C; see Figure 2 --65W
Tjjunction temperature -55 - 150 °C
Static characteristics
RDSon drain-source on-state resistance VGS =10V; I
D=10A; T
j=10C;
see Figure 12 --63m
VGS =10V; I
D=10A; T
j=2C;
see Figure 13 - 2932m
Dynamic characteristics
QGD gate-drain charge VGS =10V; I
D=15A; V
DS =50V;
see Figure 14; see Figure 15 -7-nC
QG(tot) total gate charge - 23 - nC
Avalanche ruggedn ess
EDS(AL)S non-repetitive drain-source
avalanche energy VGS =10V; T
j(init) =2C; I
D=27A;
Vsup 100 V; unclamped; RGS =50
--37mJ
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 2 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
2. Pinning information
3. Ordering information
4. Limiting values
Tabl e 2. Pinning info rmation
Pin Symbol Description Simplified outline Graphi c sy mbol
1Ssource
SOT873-1 (DFN3333-8)
2Ssource
3Ssource
4 G gate
5,6,7,8 D drain
mb D mounting base; connected to drain
1234
8765
Transparent
top view
S
D
G
mbb076
Table 3. Ordering information
Type number Package
Name Description Version
PSMN035-100LS DFN3333-8 plastic thermal enhanced very thin small outline package; no
leads; 8 terminals SOT873-1
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage Tj25 °C; Tj150 °C - 100 V
VDGR drain-gate voltage Tj150 °C; Tj25 °C; RGS =20k- 100 V
VGS gate-source voltage -20 20 V
IDdrain current VGS =10V; T
mb = 100 °C; see Figure 1 -17A
VGS =10V; T
mb =2C; see Figure 1 -27A
IDM peak drain current pulsed; tp10 µs; Tmb =2C; see Figure 3 - 109 A
Ptot total power dissipation Tmb =2C; see Figure 2 -65W
Tstg storage temperature -55 150 °C
Tjjunction temperature -55 150 °C
Tsld(M) peak soldering temperature - 260 °C
Source-drain diode
ISsource current Tmb =2C - 27 A
ISM peak source current pulsed; tp10 µs; Tmb = 25 °C - 109 A
Avalanche ruggedn ess
EDS(AL)S non-repetitive drain-source
avalanche energy VGS =10V; T
j(init) =2C; I
D=27A;
Vsup 100 V; unclamped; RGS =50
-37mJ
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 3 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
Fig 1. Continuous drain current as a function of
mounting base temperature Fig 2. Normalized total power dissi pat io n as a
function of solder point temperature
Fig 3. Safe o perating area; continuous and pe ak drain currents as a function of drain -s ource voltage
003aae352
0
10
20
30
0 50 100 150
Tmb (°C)
ID
(A)
T
mb
(°C)
0 20015050 100
003aab937
40
80
120
P
der
(%)
0
003aae353
102
101
1
10
102
103
1 10 102 103
VDS (V)
ID
(A) Limi t RDSon = VDS / ID
DC
100 ms
10 ms
1 ms
100 μs
tp = 10 μs
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 4 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
5. Thermal characteristics
[1] Rth(j-a) is guaranteed by design and assumes that the device is mounted on a 40mm x 40mm x 70µm copper pad at 20°C ambient
temperature. In practice Rth(j-a) will be determined by the customer’s PCB characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-mb) thermal resistance from junction to mounting base see Figure 4 -11.3K/W
Rth(j-a) thermal resistance from junction to ambient [1] - 5360K/W
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration; typical
values
003aae141
10
2
10
1
1
10
10
6
10
5
10
4
10
3
10
2
10
1
1
t
p
(s)
single shot
0.2
0.1
0.05
0.02
Z
th(j-mb)
(K/W)
δ
= 0.5
tpT
P
t
tp
T
δ =
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 5 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
6. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source breakdown voltage ID=0.25mA; V
GS =0V; T
j=-55°C90--V
ID=0.25mA; V
GS =0V; T
j= 25 °C 100 - - V
VGS(th) gate-source threshold voltage ID=1mA; V
DS =V
GS; Tj=15C;
see Figure 10 1--V
ID=1mA; V
DS =V
GS; Tj=2C;
see Figure 10; see Figure 11 2.334V
ID=1mA; V
DS =V
GS; Tj=-5C;
see Figure 10 --4.7V
IDSS drain leakage current VDS = 100 V; VGS =0V; T
j= 125 °C - - 50 µA
VDS = 100 V; VGS =0V; T
j= 25 °C - 0.1 2 µA
IGSS gate leakage current VGS =20V; V
DS =0V; T
j= 25 °C - 10 100 nA
VGS =-20V; V
DS =0V; T
j= 25 °C - 10 100 nA
RDSon drain-source on-state
resistance VGS =10V; I
D=10A; T
j=10C;
see Figure 12 --63m
VGS =10V; I
D=10A; T
j=15C;
see Figure 12 - 72.5 80 m
VGS =10V; I
D=10A; T
j=2C;
see Figure 13 - 2932m
RGinternal gate resistance (AC) f = 1 MHz - 0.9 -
Dynamic characteristics
QG(tot) total gate charge ID=15A; V
DS =50V; V
GS =10V;
see Figure 14; see Figure 15 -23-nC
ID=0A; V
DS =0V; V
GS =10V - 19 - nC
QGS gate-source charge ID=15A; V
DS =50V; V
GS =10V;
see Figure 14; see Figure 15 -5.7-nC
QGS(th) pre-threshold gate-source
charge ID=15A; V
DS =50V; V
GS =10V;
see Figure 14 -3.7-nC
QGS(th-pl) post-th reshold gate-source
charge -2-nC
QGD gate-drain charge ID=15A; V
DS =50V; V
GS =10V;
see Figure 14; see Figure 15 -7-nC
VGS(pl) gate-source plateau voltage VDS =50V; see Figure 14;
see Figure 15 -4.6-V
Ciss input capacitance VDS =50V; V
GS =0V; f=1MHz;
Tj= 25 °C; see Figure 16 - 1350 - pF
Coss output capacitance - 96 - pF
Crss reverse transfer capacitance - 60 - pF
td(on) turn-on delay time VDS =50V; R
L=3; VGS =10V;
RG(ext) =4.7; Tj=2C -11-ns
trrise time -6-ns
td(off) turn-off delay time - 22 - ns
tffall time -7-ns
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 6 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
Source-drain diode
VSD source-drain voltage IS=15A; V
GS =0V; T
j=2C;
see Figure 17 - 0.85 1.2 V
trr reverse recovery time IS=15A; dI
S/dt = 100 A/µs;
VGS =0V; V
DS =50V -52-ns
Qrrecovered charge - 102 - nC
Table 6. Characteristics …continued
Symbol Parameter Conditions Min Typ Max Unit
Fig 5. Forward transconductance as a function of
drain current; typical values Fig 6. Transfer characteristics: drain current as a
function of gate-s ourc e vol tage; typical values
Fig 7. Input and reverse transfer capacitances as a
function of gate-source voltage; typical values Fig 8. Dr ain-so urce on-state resistance as a function
of gate-source voltage; typical values
003aae357
0
10
20
30
40
0 10203040
ID (A)
gfs
(S)
003aae356
0
10
20
30
0246
VGS (V)
ID
(A)
Tj = 25 °C
Tj = 150 °C
003aae359
0
500
1000
1500
2000
02468
VGS (V)
C
(pF) Ciss
Crss
003aae360
0
20
40
60
80
100
0 5 10 15 20
VGS (V)
RDSon
(mΩ)
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 7 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
Fig 9. Output characteristics: drain current as a
function of drain-source voltage; typical values Fig 10. Gate-source threshold voltage as a func tion of
junction temperature
Fig 11. Sub-threshold drain curre nt as a function of
gate-source voltage Fig 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
003aae355
0
10
20
30
0 0.5 1 1.5 2
VDS (V)
ID
(A) 4.7
VGS (V) = 4.5
5
6
10
003aae486
0
1
2
3
4
5
-60 0 60 120 180
Tj (°C)
VGS(th)
(V)
max
typ
min
003aae487
VGS (V)
0642
104
105
102
103
101
ID
(A)
106
min typ max
003aae372
0
0.8
1.6
2.4
3.2
-60 0 60 120 180
Tj (°C)
a
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 8 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
Fig 13. Drain-source on-state resistance as a function
of drain current; typical values Fig 14. Gate charge waveform definitions
Fig 15. Gate-source voltage as a function of gate
charge; typical values Fig 16. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aae358
0
20
40
60
80
100
0102030
ID (A)
RDSon
(mΩ)
5
6
VGS
(V) = 4.5 4.7
10
003aaa508
VGS
VGS(th)
QGS1 QGS2
QGD
VDS
QG(tot)
ID
QGS
VGS(pl)
003aae361
0
2
4
6
8
10
0102030
Q
G
(nC)
VGS
(V)
VDS = 20 V
50 V
80 V
003aae362
10
102
103
104
101 1 10 102
VDS (V)
C
(pF)
Ciss
Coss
Crss
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 9 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
Fig 17. Source (diode forward) current as a func tion of source-drain (diode forward) voltage; typical values
003aae363
0
10
20
30
0 0.3 0.6 0.9 1.2
VSD (V)
IS
(A)
Tj = 150 °CTj = 25 °C
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 10 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
7. Package outline
Fig 18. Package outline SOT873-1 (DFN3333-8)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT873-1
SOT873-1
10-04-19
11-12-01
DIMENSIONS (mm are the original dimensions)
DFN3333-8: plastic thermal enhanced very thin small outline package; no leads;
8 terminals; body 3.3 x 3.3 x 1.0 mm
- - -- - -- - -
UNIT A
max. A1bc ee
1L1ywv
mm 1 0.05
0.00 0.45
0.25 0.2 3.4
3.2 0.65
1.80
1.58 0.05 0.1
y1
0.10.11.95 0.55
0.45
L2
0.52
0.35
DE
3.4
3.2
DhEh
2.4
2.2
0 1 2 mm
scale
detail X
AA1c
b
e1
eAC B
vMCw M
L1
L2
Eh
Dh
8
41
5
terminal 1
index area
E
terminal 1
index area
D
X
B A
C
y
C
y1
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 11 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
8. Revision history
Table 7. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PSMN035-100LS v.3 20111212 Product data sheet - PSMN035-100LS v.2
Modifications: Various changes to conte nt.
PSMN035-100LS v.2 20100818 Product data sheet - PSMN035-100LS v.1
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 12 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
9. Legal information
9.1 Data sheet status
[1] Please consult the most recently issued docume nt before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The p r oduct status of device(s) described in this document may have chan ged since th is document w as published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2 Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modificati ons or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of informati on included herein and shall have
no liability for the consequences of use of such info rmation.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sh eet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specifica t io nThe information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
9.3 Disclaimers
Limited warranty and liability — Information in this d ocument is be lieved to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semico nductors’ aggregate and cumulative liability t owards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semicondu ctors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersed es an d r eplaces all inf ormation supplied pri or
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associa ted with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Document status [1] [2] Product status [3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [shor t] data sheet Qualification This document contains data from the preliminary spec ification.
Product [short] data sheet Production This document contains the product specification.
PSMN035-100LS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 3 — 12 December 2011 13 of 14
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document ma y be interpret ed or
construed as an of fer to sell product s that is op en for accept ance or the grant ,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) d escribed herein may
be subject to export control regulat i ons. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qua lif ied nor test ed
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and st andards, customer
(a) shall use the product without NXP Semicond uctors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
9.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODEare trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors PSMN035-100LS
N-channel DFN3333-8 100 V 32 m standard level MOSFET
© NXP B.V. 2011. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 December 2011
Document identifier: PSMN035-100LS
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
11. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .4
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
10 Contact information. . . . . . . . . . . . . . . . . . . . . .13