CHA4250-QDG
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
1/14
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
5.5-11GHz Medium Power Amplifier
GaAs Monolithic Microwave IC in SMD leadless package
Description
The CHA4250-QDG is a three stages
monolithic GaAs medium power amplifier
circuit.
It is designed for commercial communication
systems.
The circuit is manufactured with a pHEMT
process, 0.5µm gate length.
Main Features
Gain & RLoss
■ Broadband performances: 5.5-11GHz
■ 26dB Linear Gain
■ 23.5dBm output power @1dB comp.
■ 31dBm output TOI
■ 25% PAE@ 1dB compression
■ DC bias: Vd=7Volt@Id=125mA
■ 24L-QFN4x4
Main Electrical Characteristics
Tamb.= +25°C
Symbol
Parameter
Min
Typ
Max
Unit
Freq
Frequency range
5.5
11.0
GHz
Gain
Linear Gain
26.0
dB
OTOI
Output TOI
31.0
dBm
Pout
Output Power @1dB comp.
23.5
dBm
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
2 7 12 17 22
Gain & Return Losses (dB)
Frequency (GHz)
S11
S21
S22
CHA4250-QDG
5.5-11GHz Medium Power Amplifier
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
2/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Electrical Characteristics
Tamb.= +25°C, Vd1=Vd2=Vd3 =+7.0V
Symbol
Parameter
Min
Typ
Max
Unit
Freq
Frequency range
5.5
11
GHz
Gain
Linear Gain
26
dB
RL_in
Input Return Loss
-12
dB
RL_out
Output Return Loss
-10
dB
OP1dB
Output power @1dB compression
23.5
dBm
Psat
Saturated output power
25
dBm
OIP3
Output IP3
31
dBm
PAE
Power Added Efficiency @ 1dB compression
25
%
NF
Noise figure
7
dB
Idq
Quiescent Drain current
125
mA
Vg
Gate voltage
-0.45
V
These values are representative of onboard measurements as defined on the drawing in
paragraph "Evaluation mother board".
Absolute Maximum Ratings (1)
Tamb.= +25°C
Symbol
Parameter
Values
Unit
Vd1,2,3
Drain bias voltage
7.5V
V
Idq
Drain bias quiescent current
0.25
A
Vg
Gate bias voltage
-2 to +0
V
Pin
Input continuous power
4
dBm
Tj
Junction temperature
175
°C
Ta
Operating temperature range
-40 to +85
°C
Tstg
Storage temperature range
-55 to +150
°C
(1) Operation of this device above anyone of these parameters may cause permanent
damage.
Typical Bias Conditions
Tamb.= +25°C
Symbol
Pad No
Parameter
Values
Unit
Vd1
12
DC Drain voltage 1st stage
7
V
Vd2
9
DC Drain voltage 2nd stage
7
V
Vd3
7
DC Drain voltage 3rd stage
7
V
Vg
22
DC Gate voltage tuned for Idq= 125mA
-0.45
V
5.5-11GHz Medium Power Amplifier
CHA4250-QDG
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
3/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Device thermal performances
All the figures given in this section are obtained assuming that the QFN device is cooled
down only by conduction through the package thermal pad (no convection mode considered).
The temperature is monitored at the package back-side interface (Tcase) as shown below.
The system maximum temperature must be adjusted in order to guarantee that Tcase
remains below the maximum value specified in the next table. So, the system PCB must be
designed to comply with this requirement.
A derating must be applied on the dissipated power if the Tcase temperature cannot be
maintained below the maximum temperature specified (see the curve Pdiss. Max) in order to
guarantee the nominal device life time (MTTF).
Recommended max. junction temperature (Tj max) : 154 °C
Junction temperature absolute maximum rating : 175 °C
Max. continuous dissipated power (Pdiss. Max.) : 0.9 W
=>
Pdiss. Max. derating above Tcase(1)=85 °C :13 mW/°C
Junction-Case thermal resistance (Rth J-C)(2) : <79 °C/W
Minimum Tcase operating temperature(3) : -40 °C
Maximum Tcase operating temperature(3) :85 °C
Minimum storage temperature : -55 °C
Maximum storage temperature : 150 °C
(1) Derating at junction temperature constant = Tj max.
(2) Rth J-C is calculated for a worst case considering the hottest junction of the MMIC and all the devices biased.
(3) Tcase=Package back side temperature measured under the die-attach-pad (see the drawing below).
6.4
DEVICE THERMAL SPECIFICATION : CHA4250-QDG
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
-50 -25 025 50 75 100 125 150 175
Pdiss. Max. @Tj <Tj max (W)
Tcase (°C)
Pdiss. Max. @Tj <Tj max (W)
Tcase
Example: QFN 16L 3x3
Location of temperature
reference point (Tcase)
on package's bottom side
CHA4250-QDG
5.5-11GHz Medium Power Amplifier
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
4/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Typical Package Sij parameters
Tamb.=+25°C, Vd1=Vd2=Vd3=+7.0V, Idq=125mA
Freq
(GHz)
S11
(dB)
PhS11
(°)
S21
(dB)
PhS21
(°)
S12
(dB)
PhS12
(°)
S22
(dB)
PhS22
(°)
2
-6.7
-156.4
-42.1
-119.3
-73.2
131.1
-0.3
-71.5
2.5
-8.7
177.5
-20.4
171.5
-81.5
158.8
-0.6
-93.4
3
-10.7
152.9
-6.0
126.1
-76.4
100.3
-1.1
-119.2
3.5
-13.3
128.6
7.2
72.9
-72.7
68.9
-2.3
-152.8
4
-16.7
102.9
19.3
-2.5
-73.7
81.1
-5.7
156.8
4.5
-21.5
70.4
26.6
-101.7
-70.1
74.3
-18.6
85.3
5
-26.2
8.9
28.6
166.6
-72.6
58.3
-23.2
-80.2
5.5
-22.7
-58.6
28.1
93.3
-69.7
64.2
-20.6
-93.3
6
-18.0
-95.2
27.1
35.3
-69.5
60.4
-18.0
-83.8
6.5
-15.0
-119.7
26.5
-13.5
-70.6
48.5
-14.6
-87.6
7
-13.2
-141.6
26.2
-57.9
-66.5
47.1
-12.2
-100.4
7.5
-12.1
-161.7
26.2
-99.9
-67.0
29.0
-10.9
-115.2
8
-11.6
-175.1
26.5
-141.2
-65.6
25.4
-10.3
-136.1
8.5
-12.3
162.0
26.9
176.6
-64.7
15.0
-9.9
-152.0
9
-14.8
133.0
27.1
133.5
-64.6
1.2
-10.0
-168.1
9.5
-20.5
80.5
27.5
89.8
-61.9
-29.4
-10.6
179.4
10
-16.6
-34.2
27.8
42.8
-60.5
-64.4
-11.6
169.5
10.5
-9.1
-85.9
27.7
-7.3
-59.7
-108.3
-12.0
160.1
11
-5.2
-123.6
26.7
-59.8
-57.1
-139.4
-12.0
146.9
11.5
-3.4
-155.2
24.7
-110.4
-56.6
177.0
-12.4
126.4
12
-2.8
-179.8
22.1
-156.0
-56.1
146.5
-13.6
99.9
12.5
-2.7
160.9
19.4
162.1
-55.9
123.8
-14.8
67.5
13
-2.7
145.6
16.6
123.1
-55.3
109.4
-15.3
28.8
13.5
-2.6
132.1
13.7
85.9
-55.4
92.0
-14.2
-7.4
14
-2.5
119.8
10.8
50.5
-55.6
69.7
-12.4
-35.4
14.5
-2.3
107.8
7.9
16.7
-59.1
60.6
-10.7
-56.3
15
-2.1
96.1
4.8
-15.4
-56.5
89.9
-9.1
-72.5
15.5
-1.9
84.5
1.8
-45.9
-54.1
72.4
-7.8
-86.2
16
-1.7
73.0
-1.3
-74.8
-52.7
61.5
-6.8
-98.3
16.5
-1.5
61.5
-4.3
-102.4
-51.4
45.9
-6.0
-109.1
17
-1.3
50.2
-7.4
-128.3
-49.6
13.2
-5.3
-118.9
17.5
-1.2
39.2
-10.3
-152.7
-52.9
-30.7
-4.7
-128.2
18
-1.1
28.6
-13.1
-176.3
-61.1
-55.6
-4.2
-137.1
18.5
-1.0
18.1
-15.8
161.0
-65.1
-129.0
-3.8
-146.0
19
-0.9
7.7
-18.4
138.8
-61.4
120.7
-3.6
-154.8
19.5
-0.8
-2.3
-20.9
116.9
-53.5
74.4
-3.3
-163.5
20
-0.8
-12.1
-23.4
95.5
-55.1
45.5
-3.2
-172.6
The Sij measurement calibration planes are defined in the paragraph “Definition of the Sij
reference planes”.
5.5-11GHz Medium Power Amplifier
CHA4250-QDG
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
5/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Typical Board Measurements
Tamb.=+25°C, Vd1=Vd2=Vd3=+7.0V, Idq=125mA
Measurement in the QFN planes as defined in paragraph “Definition of the Sij reference
planes”
Linear Gain & Return Loss
Linear Gain versus Drain voltage and Frequency
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
2 4 6 8 10 12 14
Gain & Return Losses (dB)
Frequency (GHz)
S11
S21
S22
18
19
20
21
22
23
24
25
26
27
28
29
30
4 5 6 7 8 9 10 11 12
Gain (dB)
Frequency(GHz)
7V
6V
CHA4250-QDG
5.5-11GHz Medium Power Amplifier
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
6/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Typical Board Measurements
Tamb.=+25°C, Vd1=Vd2=Vd3=+7.0V, Idq=125mA
Measurement in the plan of the connectors, using the proposed land pattern & board, as
defined in paragraph “Evaluation mother board”
Linear Gain & Return Loss
Linear Gain versus Temperature and Frequency
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
2 7 12 17 22
Gain & Return Losses (dB)
Frequency (GHz)
S11
S21
S22
8
12
16
20
24
28
32
36
40
4 5 6 7 8 9 10 11 12
Gain (dB)
Frequency(GHz)
85°C
25°C
-40°C
5.5-11GHz Medium Power Amplifier
CHA4250-QDG
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
7/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Typical Board Measurements
Vd1=Vd2=Vd3=+7.0V, Idq=125mA
Output power at 1 dB Compression versus Temperature and Frequency
Output TOI (dBm) at Pout DCL=7dBm versus Temperature and Frequency
18
19
20
21
22
23
24
25
26
27
28
5 6 7 8 9 10 11
Output P1dB (dBm)
Frequency (GHz)
85°C
25°C
-40°C
20
22
24
26
28
30
32
34
36
38
40
6 7 8 9
OIP3 (dBm)
Frequency (GHz)
25°C
+85°C
-40°C
CHA4250-QDG
5.5-11GHz Medium Power Amplifier
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
8/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Typical Board Measurements
Tamb.=+25°C, Vd1=Vd2=Vd3=+7.0V, Idq=125mA
Output IMD3 versus Pout DCL
0
5
10
15
20
25
30
35
40
45
50
55
60
6 8 10 12 14 16 18 20 22 24
IMD3 (dBc)
Output power DCL (dBm)
6GHz
7GHz
8GHz
9GHz
5.5-11GHz Medium Power Amplifier
CHA4250-QDG
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
9/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Package outline (1)
Matt tin, Lead Free
(Green)
1-
Gnd(2)
9-
Vd2
17-
Gnd(2)
Units :
mm
2-
Gnd(2)
10-
Nc
18-
Gnd(2)
From the standard :
JEDEC MO-220
3-
Gnd(2)
11-
Nc
19-
Nc
(VGGD)
4-
RF out
12-
Vd1
20-
Nc
25-
GND
5-
Gnd(2)
13-
Gnd(2)
21-
Nc
6-
Gnd(2)
14-
Gnd(2)
22-
Vg
7-
Vd3
15-
RF in
23-
Nc
8-
Nc
16-
Gnd(2)
24-
Nc
(1) The package outline drawing included to this data-sheet is given for indication. Refer to the
application note AN0017 (http://www.ums-gaas.com) for exact package dimensions.
(2) It is strongly recommended to ground all pins marked “Gnd” through the PCB board.
Ensure that the PCB board is designed to provide the best possible ground to the package.
CHA4250-QDG
5.5-11GHz Medium Power Amplifier
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
10/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Definition of the Sij reference planes
The reference planes used for Sij
measurements given above are symmetrical
from the symmetrical axis of the package
(see drawing beside). The input and output
reference planes are located at 3.18mm
offset (input wise and output wise
respectively) from this axis. Then, the given
Sij parameters incorporate the land pattern of
the evaluation motherboard recommended in
paragraph "Evaluation mother board".
3.18 3.18
5.5-11GHz Medium Power Amplifier
CHA4250-QDG
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
11/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Evaluation mother board
■ Compatible with the proposed footprint.
■ Based on typically Ro4003 / 8mils or equivalent.
■ Using a micro-strip to coplanar transition to access the package.
■ Recommended for the implementation of this product on a module board.
■ First decoupling network is done with 100pF capacitors, second decoupling network is
done with 10nF capacitors.
■ See application note AN0017 for details.
CHA4250-QDG
5.5-11GHz Medium Power Amplifier
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
12/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Notes
The DC connections do not include any decoupling capacitor in package, therefore it is
mandatory to provide a good external DC decoupling (100pF & 10nF) on the PC board, as
close as possible to the package.
VD2
RF OUT
RF IN
VG
15 4
9
22
VD3
7
VD1
12
Vd1
Vd2
Vd3
Vg
5.5-11GHz Medium Power Amplifier
CHA4250-QDG
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
13/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
DC Schematic
7V, 125mA
20 mA
VG # -0.5 V
60 mA
45 mA
VD1
112
RF in
50
3
VD2
VD3
RF out
25
5
20
Vg#-0.5V
Vd3
Vd2
Vd1
CHA4250-QDG
5.5-11GHz Medium Power Amplifier
Ref. : DSCHA4250-QDG3021 - 21 Jan 13
14/14
Specifications subject to change without notice
Bat. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
Recommended package footprint
Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot
print recommendations.
SMD mounting procedure
For the mounting process standard techniques involving solder paste and a suitable reflow
process can be used. For further details, see application note AN0017.
Recommended environmental management
UMS products are compliant with the regulation in particular with the directives RoHS
N°2011/65 and REACh N°1907/2006. More environmental data are available in the
application note AN0019 also available at http://www.ums-gaas.com.
Recommended ESD management
Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD
sensitivity and handling recommendations for the UMS package products.
Ordering Information
QFN 4x4 RoHS compliant package:
CHA4250-QDG/XY
Stick: XY = 20
Tape & reel: XY = 21
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors
S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of
patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all
information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use
as critical components in life support devices or systems without express written approval from United
Monolithic Semiconductors S.A.S.
