PD- 95139 SMPS MOSFET IRF830AS/LPbF HEXFET(R) Power MOSFET Applications Switch Mode Power Supply (SMPS) l Uninterruptable Power Supply l High Speed Power Switching l Lead-Free l Benefits Low Gate Charge Qg Results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss specified (See AN 1001) VDSS RDS(on) max ID 1.40 5.0A 500V l D2Pak TO-262 Absolute Maximum Ratings ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds 5.0 3.2 20 3.1 74 0.59 30 5.3 -55 to + 150 Units A W W/C V V/ns C 300 (1.6mm from case ) Typical SMPS Topologies: l l Two Transistor Forward Half Bridge and Full Bridge Notes through are on page 10 www.irf.com 1 04/21/04 IRF830AS/LPbF Static @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 500 --- --- 2.0 --- --- --- --- Typ. --- 0.60 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 1.4 VGS = 10V, ID = 3.0A 4.5 V VDS = VGS, ID = 250A 25 VDS = 500V, VGS = 0V A 250 VDS = 400V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 2.8 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 10 21 21 15 620 93 4.3 886 27 39 Max. Units Conditions --- S VDS = 50V, ID = 3.0A 24 ID = 5.0A 6.3 nC VDS = 400V 11 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 5.0A ns --- RG = 14 --- RD = 49,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units --- --- --- 230 5.0 7.4 mJ A mJ Typ. Max. Units --- --- 1.7 40 C/W Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted, steady-state)* Diode Characteristics IS ISM VSD trr Qrr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 5.0 showing the A G integral reverse --- --- 20 S p-n junction diode. --- --- 1.5 V TJ = 25C, IS = 5.0A, VGS = 0V --- 430 650 ns TJ = 25C, IF = 5.0A --- 2.0 3.0 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRF830AS/LPbF 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 1 4.5V 0.1 20s PULSE WIDTH T = 25 C J 0.01 0.1 1 10 10 1 4.5V 20s PULSE WIDTH T = 150 C J 0.1 100 1 Fig 1. Typical Output Characteristics 10 TJ = 150 C TJ = 25 C 1 V DS = 50V 20s PULSE WIDTH 6.0 7.0 Fig 3. Typical Transfer Characteristics www.irf.com 8.0 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 2.5 5.0 100 Fig 2. Typical Output Characteristics 100 VGS , Gate-to-Source Voltage (V) 10 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 0.1 4.0 ID = 5.0A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRF830AS/LPbF V GS = C iss = C rs s = C oss = 20 0V, f = 1M Hz Cg s + C g d , Cd s SHO RTE D C gd Cds + C gd 1000 VGS , Gate-to-Source Voltage (V) C, Capacitance (pF) 10000 C iss 100 C os s 10 C rss 1 1 10 100 1000 ID = 5.0A VDS = 400V VDS = 250V VDS = 100V 16 12 8 4 0 A FOR TEST CIRCUIT SEE FIGURE 13 0 4 8 12 16 20 24 Q G , Total Gate Charge (nC) V D S , D ra in-to-S ource V oltage (V) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 100 OPERATION IN THIS AREA LIMITED BY R 10 TJ = 150 C 1 TJ = 25 C 0.1 0.2 0.4 0.6 0.8 1.0 Fig 7. Typical Source-Drain Diode Forward Voltage 10us 10 100us 1ms 1 10ms V GS = 0 V VSD ,Source-to-Drain Voltage (V) 4 I D , Drain Current (A) ISD , Reverse Drain Current (A) DS(on) 1.2 0.1 TC = 25 C TJ = 150 C Single Pulse 10 100 1000 10000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRF830AS/LPbF 5.0 RD VDS VGS I D , Drain Current (A) 4.0 D.U.T. RG 3.0 + -VDD 10V Pulse Width 1 s Duty Factor 0.1 % 2.0 Fig 10a. Switching Time Test Circuit 1.0 VDS 90% 0.0 25 50 75 100 TC , Case Temperature 125 150 ( C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 0.1 P DM 0.05 0.02 0.01 0.01 0.00001 t1 t2 SINGLE PULSE (THERMAL RESPONSE) 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF830AS/LPbF + V - DD IA S 0 .0 1 tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp A EAS , Single Pulse Avalanche Energy (mJ) D .U .T RG 20V D R IV E R L VDS 500 1 5V TOP 400 BOTTOM ID 2.2A 3.2A 5.0A 300 200 100 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( C) IAS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG QGS 790 QGD VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50K 12V .2F .3F D.U.T. V D S a v , A valanche V oltage (V ) 10 V 785 780 775 + V - DS 770 0.0 VGS 2.0 3.0 4.0 5.0 I a v , A v alanc he C urrent (A ) 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 1.0 Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current www.irf.com A IRF830AS/LPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + RG * * * * Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFET www.irf.com 7 IRF830AS/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information (Lead-Free) T H I S IS AN IR F 53 0 S WIT H L OT COD E 8 02 4 AS S E MB L E D ON WW 0 2 , 2 00 0 IN T H E AS S E MB L Y L IN E "L " IN T E R N AT ION AL R E CT IF IE R L OGO N ote: "P " in as s embly line pos ition indicates "L ead-F ree" P AR T N U MB E R F 53 0S AS S E MB L Y L OT COD E D AT E COD E YE AR 0 = 200 0 WE E K 02 L IN E L OR INT E R NAT ION AL R E CT IF IE R L OGO AS S E MB L Y L OT COD E 8 P AR T N U MB E R F 53 0S DAT E COD E P = DE S IGNAT E S L E AD -F R E E P R ODU CT (OP T IONAL ) YE AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E COD E www.irf.com IRF830AS/LPbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information E X AMP L E : T H IS IS AN IR L 3103L L OT COD E 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" Note: "P " in as s embly line pos ition indicates "L ead-F ree" IN T E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C OR IN T E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE www.irf.com P AR T NU MB E R DAT E CODE P = DE S IGNAT E S L E AD-F R E E P R ODU CT (OP T IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE 9 IRF830AS/LPbF D2Pak Tape & Reel Information TRR 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .1 6 1 ) 3 .9 0 ( .1 5 3 ) F E E D D IR E C TI O N 1 .60 (.06 3) 1 .50 (.05 9) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 1 .8 5 ( .0 7 3 ) 1 .6 5 ( .0 6 5 ) 0.3 6 8 (.0 1 4 5 ) 0.3 4 2 (.0 1 3 5 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) 1 5 .42 (.6 09 ) 1 5 .22 (.6 01 ) TRL 1 .7 5 (.0 69 ) 1 .2 5 (.0 49 ) 1 0.9 0 (.42 9 ) 1 0.7 0 (.42 1 ) 4 .7 2 (.1 36 ) 4 .5 2 (.1 78 ) 1 6 .1 0 (.6 3 4 ) 1 5 .9 0 (.6 2 6 ) F E E D D I R E C T IO N 13 .5 0 (.5 32 ) 12 .8 0 (.5 04 ) 27 .4 0 (1.07 9) 23 .9 0 (.9 41 ) 4 33 0.0 0 (14 .17 3) MAX. 6 0.00 (2 .36 2) M IN . N O T ES : 1. C O M F O R M S T O EIA- 418 . 2. C O N T R O L LIN G D IM E N SIO N : M ILL IM E T ER . 3. D IM EN S IO N M E A SU R E D @ HU B . 4. IN C L U D ES F LA N G E D IST O R T IO N @ O U TE R ED G E. 30.4 0 (1.1 97 ) MAX. 2 6 .4 0 (1 .03 9) 2 4 .4 0 (.9 61 ) 4 3 Notes: Repetitive rating; pulse width limited by Pulse width 300s; duty cycle 2%. Starting TJ = 25C, L = 18mH Coss eff. is a fixed capacitance that gives the same charging time ISD 5.0A, di/dt 370A/s, VDD V(BR)DSS, Uses IRF830A data and test conditions max. junction temperature. ( See fig. 11 ) RG = 25, IAS = 5.0A. (See Figure 12) TJ 150C as Coss while VDS is rising from 0 to 80% VDSS * When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. 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