IRL2505S/L
HEXFET® Power MOSFET
PD - 91326D
lAdvanced Process Technology
lSurface Mount (IRL2505S)
lLow-profile through-hole (IRL2505L)
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.75
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** – – – 4 0
Thermal Resistance
°C/W
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 104
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V74 A
IDM Pulsed Drain Current 360
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 200 W
Linear Derating Factor 1.3 W/°C
VGS Gate-to-Source Voltage ±16 V
EAS Single Pulse Avalanche Energy 500 mJ
IAR Avalanche Current54 A
EAR Repetitive Avalanche Energy20 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRL2505L) is available for low-
profile applications.
Description
VDSS = 55V
RDS(on) = 0.008 Ω
ID = 104A
2
D P a k
TO-262
S
D
G
5/12/98
lLogic-Level Gate Drive
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IRL2505S/L
Caculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.035 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.008 VGS = 10V, ID = 54A
––– ––– 0.010 ΩVGS = 5.0V, ID = 54A
––– ––– 0.013 VGS = 4.0V, ID = 45A
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 59 ––– ––– S VDS = 25V, ID = 54A
––– ––– 25 VDS = 55V, VGS = 0V
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 16V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
QgTotal Gate Charge ––– ––– 130 ID = 54A
Qgs Gate-to-Source Charge ––– ––– 25 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 67 VGS = 5.0V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 12 ––– VDD = 28V
trRise Time ––– 160 ––– ID = 54A
td(off) Turn-Off Delay Time ––– 43 ––– RG = 1.3Ω, VGS = 5.0V
tfFall Time ––– 84 ––– RD = 0.50Ω, See Fig. 10
Between lead,
––– ––– and center of die contact
Ciss Input Capacitance ––– 5000 ––– VGS = 0V
Coss Output Capacitance ––– 1100 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 390 ––– ƒ = 1.0MHz, See Fig. 5
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
nH
RDS(on) Static Drain-to-Source On-Resistance
LSInternal Source Inductance 7.5
ns
IDSS Drain-to-Source Leakage Current µA
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 54A, VGS = 0V
trr Reverse Recovery Time ––– 140 210 n s TJ = 25°C, IF = 54A
Qrr Reverse Recovery Charge ––– 650 970 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S+LD)
Source-Drain Ratings and Characteristics
S
D
G
A
104
360
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Notes:
Uses IRL2505 data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
ISD ≤ 54A, di/dt ≤ 230A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
VDD = 25V, starting TJ = 25°C, L = 240µH
RG = 25Ω, IAS = 54A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
IGSS
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Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , J u nc tio n T emp eratur e (°C )
R , Dra in-to -S o u rc e O n R e s is ta nc e
DS(on)
(Normalized)
V = 1 0V
GS
A
I = 9 0A
D
1
10
100
1000
0.1 1 10 100
I , Dra in -to-So u rc e Cur ren t (A)
D
V , Dra in -t o-So u rc e Vo lta
g
e
(
V
)
DS
A
20
µ
s PU LSE WIDTH
T = 25°C
J
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Dra in -t o-So u rc e Vo lta
g
e
(
V
)
DS
A
20
µ
s PU LSE WIDTH
T = 175°C
VGS
TOP 15V
1 2V
1 0V
8 .0V
6 .0V
4 .0V
3 .0V
BOTTOM 2.5V
2.5V
J
1
10
100
1000
2.5 3.5 4.5 5.5 6.5 7.5
T = 25°C
J
GS
V , G ate -to -S ou rce Volta
g
e (V)
D
I , D ra in -to-S o urc e C u rre nt (A )
T = 175°C
J
A
V = 25 V
20µs PULSE WIDTH
DS
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IRL2505S/L
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
0
2000
4000
6000
8000
10000
1 10 100
C , Capacitance (pF)
DS
V , Dra in -to -So u rc e Vo lt a
g
e
(
V
)
A
V = 0V, f = 1MHz
C = C + C , C S H O RT E D
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
3
6
9
12
15
0 40 80 120 160 200
Q , To ta l Ga te Cha r
g
e
(
nC
)
G
V , G a te -to -S o u rc e Vo ltag e (V)
GS
A
FO R TEST CIRCU IT
S E E F IG U R E 1 3
I = 5 4A V = 44 V
V = 2 8 V
D
DS
DS
10
100
1000
0.4 0.8 1.2 1.6 2.0 2.4 2.8
T = 25°C
J
V = 0V
GS
V , Source-to-D rain V oltage (V)
I , Re ve rs e D ra in Cur re nt (A)
SD
SD
A
T = 17 5°C
J
1
10
100
1000
1 10 100
V , Dra in -to -S ou rc e Vo lta
g
e
(
V
)
DS
I , Dra in C u rre nt (A)
O P ER A T IO N IN T H IS A R E A L IMITED
B Y R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 25 °C
T = 17 5 °C
Sin
g
le Pul s e
C
J
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IRL2505S/L
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
VGS
RGD.U.T.
5.0V
+
-
VDD
25 50 75 100 125 150 175
0
20
40
60
80
100
120
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
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IRL2505S/L
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
Fig 13a. Basic Gate Charge Waveform
V
DS
L
D.U.T.
V
DD
I
AS
t
p
0.01Ω
R
G
+
-
t
p
V
DS
I
AS
V
DD
V
(BR)DSS
10 V
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 13b. Gate Charge Test Circuit
Q
G
Q
GS
Q
GD
V
G
Charge
10 V
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
0
200
400
600
800
1000
1200
25 50 75 100 125 150 175
J
E , Sin g le Pu ls e Av a lan c he En erg y ( mJ )
AS
A
Startin
g
T , Junction Tem perature
(
°C
)
V = 2 5 V
I
T O P 22 A
3 8A
B OT TOM 54 A
DD
D
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IRL2505S/L
Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
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IRL2505S/L
D2Pak Package Outline
D2Pak
Part Marking Information
10.16 (.400)
R EF.
6.47 (.255 )
6.18 (.243 )
2.61 (.103 )
2.32 (.091 )
8.89 (.350)
REF .
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
5 .28 (.208)
4 .78 (.188)
4.69 (.185)
4.20 (.165)
10.54 (.415)
10.29 (.405)
- A -
2
1 3 15 .49 (.610)
14 .73 (.580)
3X 0.93 (.037)
0.69 (.027)
5 .08 (.200)
3X 1.40 (.055)
1.14 (.045)
1.78 (.070)
1.27 (.050)
1.40 (.055)
MAX .
NOTES:
1 DIMENSIONS AFTER SOLDER DIP.
2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M , 1982.
3 CONTROLLING DIMENSION : INCH.
4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.
0.55 (.022)
0.46 (.018)
0.25 ( .0 10 ) M B A M MINIMUM RECOMMENDED FOOTPRINT
11.43 (.450)
8.89 (.350 )
17 .78 (.700)
3.81 (.150)
2.08 (.082)
2X
LEAD ASSIGNMENTS
1 - G AT E
2 - D RAIN
3 - S OUR CE
2.54 (.100)
2X
PAR T N UM B ER
INTERNATIONAL
RE CTIFIE R
LOG O DATE CODE
(YYW W )
YY = YEAR
WW = WEEK
A S SEMBLY
LOT C O D E
F530S
9B 1 M
9246
A
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IRL2505S/L
Package Outline
TO-262 Outline
TO-262
Part Marking Information
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IRL2505S/L
Tape & Reel Information
D2Pak
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 5/98
3
4
4
TRR
FEED DIRECTION
1.85 (.07 3)
1.65 (.06 5)
1.60 (.063)
1.50 (.059)
4.10 (.16 1)
3.90 (.15 3)
TRL
FE ED D IRECTION
10 .9 0 (.429)
10 .7 0 (.421) 16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.3 68 (.0145)
0.3 42 (.0135)
1 .60 (.063)
1 .50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
2 7.4 0 ( 1.079)
2 3.9 0 ( .941)
60.00 (2.362)
M IN .
3 0.40 (1.1 97)
M A X .
26.40 (1.0 39)
24 .40 ( .961 )
NOT ES :
1. CO M F O RM S TO E IA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIM ENSIO N MEASUR ED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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