© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 7 1Publication Order Number:
MC74LVX14/D
MC74LVX14
Hex Schmitt Inverter
With 5 V−Tolerant Inputs
The MC74LVX14 is an advanced high speed CMOS Schmitt
inverter. The inputs tolerate voltages up to 7 V, allowing the interface
of 5 V systems to 3 V systems.
The MC74LVX14 is pin and functionally compatible to the
MC74LVX04, but the inputs have hysteresis and, with its Schmitt
trigger function, can be used as a line receiver which will receive slow
input signals.
Features
•High Speed: tPD = 6.8 ns (Typ) at VCC = 3.3 V
•Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
•Powerdown Protection Provided on Inputs
•Balanced Propagation Delays
•Low Noise: VOLP = 0.5 V (Max)
•Pin and Function Compatible with Other Standard Logic Families
•Latchup Performance Exceeds 300 mA
•ESD Performance: Human Body Model > 2000 V;
Machine Model > 200 V
•NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
•These Devices are Pb−Free and are RoHS Compliant
Figure 1. Logic Diagram
2O0
1
A0
4O1
3
A1
6O2
5
A2
8O3
9
A3
10 O4
11
A4
12 O5
13
A5
PIN NAMES
Pins Function
An
On Data Inputs
Data Outputs
FUNCTION TABLE
An On
L
HH
LSee detailed ordering and shipping information in the packag
e
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
MARKING DIAGRAMS
TSSOP−14
DT SUFFIX
CASE 948G
SOIC−14 NB
D SUFFIX
CASE 751A
LVX14G
AWLYWW
1
14
LVX
14
ALYWG
G
1
14
LVX14 = Specific Device Code
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G= Pb−Free Package
(Note: Microdot may be in either location)
TSSOP−14
SOIC−14 NB
PIN ASSIGNMENT
14−Lead (Top View)
1314 12 11 10 9 8
21 34567
VCC A5 O5 A4 O4 A3 O3
A0 O0 A1 O1 A2 O2 GND
MC74LVX14
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2
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC DC Supply Voltage –0.5 to +7.0 V
Vin DC Input Voltage –0.5 to +7.0 V
Vout DC Output Voltage –0.5 to VCC +0.5 V
IIK Input Diode Current −20 mA
IOK Output Diode Current ±20 mA
Iout DC Output Current, per Pin ±25 mA
ICC DC Supply Current, VCC and GND Pins ±50 mA
PDPower Dissipation 180 mW
Tstg Storage Temperature –65 to +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be af fected.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC DC Supply Voltage 2.0 3.6 V
Vin DC Input Voltage 0 5.5 V
Vout DC Output Voltage 0 VCC V
TAOperating Temperature, All Package Types −40 +85 °C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Symbo
l
Parameter Test Conditions VCC
V
TA = 25°C TA = −40 to 85°C
Unit
Min Typ Max Min Max
VT+ Positive Threshold Voltage (Figure 4) 3.0 2.20 2.20 V
VT− Negative Threshold Voltage (Figure 4) 3.0 0.90 0.90 V
VHHysteresis Voltage (Figure 4) 3.0 0.30 1.20 0.30 1.20 V
VOH High−Level Output Voltage
(Vin = VIH or VIL)IOH = −50 mA
IOH = −50 mA
IOH = −4 mA
2.0
3.0
3.0
1.9
2.9
2.58
2.0
3.0 1.9
2.9
2.48
V
VOL Low−Level Output Voltage
(Vin = VIH or VIL)IOL = 50 mA
IOL = 50 mA
IOL = 4 mA
2.0
3.0
3.0
0.0
0.0 0.1
0.1
0.36
0.1
0.1
0.44
V
Iin Input Leakage Current Vin = 5.5 V or GND 3.6 ±0.1 ±1.0 mA
ICC Quiescent Supply Current Vin = VCC or GND 3.6 2.0 20.0 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Symbo
l
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Parameter
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
Test Conditions
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
TA = 25°C
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
TA = −40 to 85°C
ÎÎÎ
ÎÎÎ
ÎÎÎ
Unit
ÎÎÎ
ÎÎÎ
Min
ÎÎÎ
ÎÎÎ
Typ
ÎÎ
ÎÎ
Max
ÎÎÎÎ
ÎÎÎÎ
Min
ÎÎÎ
ÎÎÎ
Max
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tPLH,
tPHL
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Propagation Delay, Input−to−Outpu
t
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
VCC = 2.7 V CL = 15 pF
CL = 50 pF
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
8.7
11.2
ÎÎ
ÎÎ
ÎÎ
16.3
19.8
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
1.0
1.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
19.5
23.0
ÎÎÎ
ÎÎÎ
ÎÎÎ
ns
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
VCC = 3.3 ± 0.3 V CL = 15 pF
CL = 50 pF
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
6.8
9.3
ÎÎ
ÎÎ
10.6
14.1
ÎÎÎÎ
ÎÎÎÎ
1.0
1.0
ÎÎÎ
ÎÎÎ
12.5
16.0
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tOSHL
tOSLH
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Output−to−Output Skew (Note 1)
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
VCC = 2.7 V CL = 50 pF
VCC = 3.3 ± 0.3 V CL = 50 pF
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎ
ÎÎ
1.5
1.5
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
1.5
1.5
ÎÎÎ
ÎÎÎ
ns
1. Skew is defined as the absolute value of the dif ference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
MC74LVX14
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3
CAPACITIVE CHARACTERISTICS
Symbo
l
Parameter
TA = 25°C TA = −40 to 85°C
Unit
Min Typ Max Min Max
Cin Input Capacitance 4 10 10 pF
CPD Power Dissipation Capacitance (Note 2) 21 pF
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC/6 (per buffer). CPD is used to determine the
no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V, Measured in SOIC Package)
Symbo
l
Characteristic
TA = 25°C
Unit
Typ Max
VOLP Quiet Output Maximum Dynamic VOL 0.3 0.5 V
VOLV Quiet Output Minimum Dynamic VOL −0.3 −0.5 V
VIHD Minimum High Level Dynamic Input Voltage 2.0 V
VILD Maximum Low Level Dynamic Input Voltage 0.9 V
Figure 2. Switching Waveforms
VCC
GND
50%
50% VCC
A
O
tPHL
tPLH
*Includes all probe and jig capacitance
Figure 3. Test Circuit
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
ORDERING INFORMATION
Device Package Shipping†
MC74LVX14DR2G SOIC−14 NB
(Pb−Free) 2500 Tape & Reel
MC74LVX14DTR2G TSSOP−14
(Pb−Free) 2500 Tape & Reel
NLV74LVX14DTR2G* TSSOP−14
(Pb−Free) 2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
MC74LVX14
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4
VH
Vin
Vout
VCC
VT+
VT-
GND
VOH
VOL
VH
Vin
Vout
VCC
VT+
VT-
GND
VOH
VOL
(a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times
(b) A Schmitt-Trigger Offers Maximum Noise Immunity
VHtyp
Figure 4. Typical Input Threshold, VT+, VT− versus Power Supply Voltage
VCC, POWER SUPPLY VOLTAGE (VOLTS)
23
1
2
3
4
VT, TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS)
VHtyp = (VT+ typ) - (VT- typ)
(VT+)
(VT-)
Figure 5. Typical Schmitt−Trigger Applications
2.5 3.5 3.6
MC74LVX14
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5
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.50 0.60 0.020 0.024
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
____
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V S
T
L−U−
SEATING
PLANE
0.10 (0.004)
−T−
ÇÇÇ
ÇÇÇ
ÇÇÇ
SECTION N−N
DETAIL E
JJ1
K
K1
ÉÉÉ
ÉÉÉ
DETAIL E
F
M
−W−
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
−V−
14X REFK
N
N
7.06
14X
0.36 14X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MC74LVX14
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6
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
H
14 8
71
M
0.25 B M
C
h
X 45
SEATING
PLANE
A1
A
M
_
S
A
M
0.25 B S
C
b
13X
B
A
E
D
e
DET AIL A
L
A3
DET AIL A
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
D8.55 8.75 0.337 0.344
E3.80 4.00 0.150 0.157
A1.35 1.75 0.054 0.068
b0.35 0.49 0.014 0.019
L0.40 1.25 0.016 0.049
e1.27 BSC 0.050 BSC
A3 0.19 0.25 0.008 0.010
A1 0.10 0.25 0.004 0.010
M0 7 0 7
H5.80 6.20 0.228 0.244
h0.25 0.50 0.010 0.019
__ __
6.50
14X
0.58
14X
1.18
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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UBLICATION ORDERING INFORMATION
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Phone: 81−3−5817−1050
MC74LVX14/D
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