TC1303A-XN0EMF - Microchip Technology, Inc.

TC1303A/TC1303B/

TC1303C/TC1304

Features

• Dual-Output Regulator (500 mA Buck Regulator

and 300 mA Low-Dropout Regulator)

• Power-Good Output with 300 ms Delay

• Total Device Quiescent Current = 65 µA, Typical

• Independent Shutdown for Buck and LDO

Outputs (TC1303)

• Both Outputs Internally Compensated

• Synchronous Buck Regulator:

- Over 90% Typical Efficiency

- 2.0 MHz Fixed-Frequency PWM

(Heavy Load)

- Low Output Noise

- Automatic PWM to PFM mode transition

- Adjustable (0.8V to 4.5V) and Standard

Fixed-Output Voltages (0.8V, 1.2V, 1.5V,

1.8V, 2.5V, 3.3V)

• Low-Dropout Regulator:

- Low-Dropout Voltage = 137 mV Typical @

200 mA

- Standard Fixed-Output Voltages

(1.5V, 1.8V, 2.5V, 3.3V)

• Power-Good Function:

- Monitors Buck Output Function (TC1303A)

- Monitors LDO Output Function (TC1303B)

- Monitors Both Buck and LDO Output

Functions (TC1303C and TC1304)

- 300 ms Delay Used for Processor Reset

• Sequenced Startup and Shutdown (TC1304)

• Small 10-pin 3x3 DFN or MSOP Package Options

• Operating Junction Temperature Range:

- -40°C to +125°C

• Undervoltage Lockout (UVLO)

• Output Short Circuit Protection

• Overtemperature Protection

Applications

• Cellular Phones

• Portable Computers

• USB-Powered Devices

• Handheld Medical Instruments

• Organizers and PDAs

Description

The TC1303/TC1304 combines a 500 mA

synchronous buck regulator and 300 mA Low-Dropout

Regulator (LDO) with a power-good monitor to provide

a highly integrated solution for devices that require

multiple supply voltages. The unique combination of an

integrated buck switching regulator and low-dropout

linear regulator provides the lowest system cost for

dual-output voltage applications that require one lower

processor core voltage and one higher bias voltage.

The 500 mA synchronous buck regulator switches at a

fixed frequency of 2.0 MHz when the load is heavy,

providing a low noise, small-size solution. When the

load on the buck output is reduced to light levels, it

changes operation to a Pulse Frequency Modulation

(PFM) mode to minimize quiescent current draw from

the battery. No intervention is necessary for smooth

transition from one mode to another.

The LDO provides a 300 mA auxiliary output that

requires a single 1 µF ceramic output capacitor,

minimizing board area and cost. The typical dropout

voltage for the LDO output is 137 mV for a 200 mA

load.

For the TC1303/TC1304, the power-good output is

based on the regulation of the buck regulator output, the

LDO output or the combination of both. The TC1304

features start-up and shutdown output sequencing.

The TC1303/TC1304 is available in either the 10-pin

DFN or MSOP package.

Additional protection features include: UVLO,

overtemperature and overcurrent protection on both

outputs.

For a complete listing of TC1303/TC1304 standard

parts, consult your Microchip representative.

500 mA Synchronous Buck Regulator,

+ 300 mA LDO with Power-Good Output

TC1303A/TC1303B/TC1303C/TC1304

Package Types

10-Lead DFN

VFB1/VOUT1

10-Lead MSOP

SHDN2

VIN2

VOUT2

AGND

PGND

VIN1

SHDN1

VFB1/VOUT1

10-Lead DFN 10-Lead MSOP

SHDN

VIN2

VOUT2

AGND

PGND

VIN1

VFB1/VOUT1

PG AGND

TC1303A,B,C

TC1304

VOUT2

VIN2

VIN1

7SHDN1

PGND

SHDN2

AGND

VFB1/VOUT1

VOUT2

VIN2

VIN1

7AGND

PGND

SHDN

AGND

TC1303A/TC1303B/TC1303C/TC1304

Functional Block Diagram – TC1303

Synchronous Buck Regulator

NDRV

PDRV

PGND

VIN1

Driver

PGND

Control

VOUT1/VFB1

VIN2

SHDN1

VREF

LDO

VOUT2

AGND

PGND

Undervoltage Lockout UVLO

UVLO

SHDN2

VREF

TC1303A(1),B(2),C(1) options

PG Generator with Delay

(UVLO)

Sense LDO for B,C

Sense Switcher for A,C

Note 1: PG open-drain for A,C options

2: PG push-pull output for B option

TC1303A/TC1303B/TC1303C/TC1304

Functional Block Diagram – TC1304

Synchronous Buck Regulator

NDRV

PDRV

PGND

VIN1

Driver

PGND

Control

VOUT1/VFB1

VIN2

SHDN

VREF

LDO

VOUT2

AGND

PGND

Undervoltage Lockout UVLO

UVLO

VREF

TC1304(Note)

PG Generator with Delay

(UVLO)

Output Voltage

Sequencer ckt. AGND

Note: PG open-drain for TC1304

TC1303A/TC1303B/TC1303C/TC1304

Typical Application Circuits

10-Lead DFN

SHDN2

VIN2

VOUT2

AGND

PGND

VIN1

SHDN1 VOUT1

4.7 μF

Processor

RESET

Input

Voltage

4.7 μH

4.7 ΜF2.1V @

1ΜF3.3V @

4.5V to 5.5V

Adjustable-Output Application

121 kΩ

200 kΩ4.99 kΩ

33 pF

3SHDN2

VIN2

VOUT2

AGND

PGND

VIN1

SHDN1 VOUT1

4.7 μF

Processor

RESET

4.7 μH

4.7 μF1.5V @ 500 mA

1μF2.5V @ 300 mA

2.7V to 4.2V

TC1303B

VOUT1

VOUT2

VIN

VOUT1

VOUT2

1.0 μF

*Optional

Capacitor

IN2 300 mA

500 mA

Note: Connect DFN package exposed pad to AGND.

10-Lead MSOP

Fixed-Output Application

TC1303A

(Note)

RPULLUP

3SHDN

VIN2

VOUT2

AGND

PGND

VIN1

VOUT1

4.7 μF

Processor

RESET

4.7 μH

4.7 ΜF1.2V @ 500 mA

1μF2.5V @ 300 mA

2.7V to 4.2V VOUT1

VOUT2

VIN

10-Lead MSOP

Fixed-Output Application

TC1304

RPULLUP

AGND

TC1303A/TC1303B/TC1303C/TC1304

NOTES:

TC1303A/TC1303B/TC1303C/TC1304

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings †

VIN - AGND.......................................................................6.0V

All Other I/O ...............................(AGND - 0.3V) to (VIN + 0.3V)

LX to PGND...............................................-0.3V to (VIN + 0.3V)

PGND to AGND .................................................. -0.3V to +0.3V

Output Short Circuit Current ................................ Continuous

Power Dissipation (Note 7) .......................... Internally Limited

Storage temperature .....................................-65°C to +150°C

Ambient Temp. with Power Applied ................-40°C to +85°C

Operating Junction Temperature...................-40°C to +125°C

ESD protection on all pins (HBM) ....................................... 3kV

† Notice: Stresses above those listed under “Maximum

Ratings” may cause permanent damage to the device. This is

a stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operational listings of this specification is not implied.

Exposure to maximum rating conditions for extended periods

may affect device reliability.

DC CHARACTERISTICS

Electrical Characteristics: VIN1 =VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

= 4.7 µH, VOUT1 (ADJ) = 1.8V,

IOUT1 = 100 mA, IOUT2 = 0.1 mA TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C.

Parameters Sym Min Typ Max Units Conditions

Input/Output Characteristics

Input Voltage VIN 2.7 —5.5 VNote 1, Note 2, Note 8

Maximum Output Current IOUT1_MAX 500 —— mANote 1

Maximum Output Current IOUT2_MAX 300 —— mANote 1

Shutdown Current

Combined VIN1 and VIN2 Current

IIN_SHDN — 0.05 1 µA SHDN1 =SHDN2=GND

TC1303A,B Operating IQ

TC1303C, TC1304 Operating IQ

— 65.0

70.1

110

µA SHDN1 =SHDN2=V

IN2

IOUT1 =0mA, I

OUT2 =0mA

Synchronous Buck IQ— 38 — µA SHDN1 = VIN, SHDN2 = GND

LDO IQ— 46 — µA SHDN1 = GND, SHDN2 = VIN2

Shutdown/UVLO/Thermal Shutdown Characteristics

SHDN1,SHDN2, SHDN (TC1304)

Logic Input Voltage Low

VIL ——15 %VIN VIN1 =VIN2 = 2.7V to 5.5V

SHDN1,SHDN2, SHDN (TC1304)

Logic Input Voltage High

VIH 45 ——%V

IN VIN1 =VIN2 = 2.7V to 5.5V

SHDN1,SHDN2, SHDN (TC1304)

Input Leakage Current

IIN -1.0 ±0.01 1.0 µA VIN1 =VIN2 = 2.7V to 5.5V

SHDNX =GND

SHDNY =V

Thermal Shutdown TSHD — 165 — °C Note 6, Note 7

Thermal Shutdown Hysteresis TSHD-HYS —10— °C

Undervoltage Lockout

(VOUT1 and VOUT2)

UVLO 2.4 2.55 2.7 VV

IN1 Falling

Undervoltage Lockout Hysteresis UVLO-HYS — 200 — mV

Note 1: The Minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VRX + VDROPOUT, VRX = VR1 or VR2.

2: VRX is the regulator output voltage setting.

3: TCVOUT2 = ((VOUT2max – VOUT2min) * 106)/(VOUT2 * DT).

4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested

over a load range from 0.1 mA to the maximum specified output current.

5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its

nominal value measured at a 1V differential.

6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction

temperature and the thermal resistance from junction to air. (i.e. TA, TJ, θJA). Exceeding the maximum allowable power

dissipation causes the device to initiate thermal shutdown.

7: The integrated MOSFET switches have an integral diode from the LX pin to VIN, and from LX to PGND. In cases where

these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not

able to limit the junction temperature for these cases.

8: VIN1 and VIN2 are supplied by the same input source.

TC1303A/TC1303B/TC1303C/TC1304

Synchronous Buck Regulator (VOUT1)

Adjustable Output Voltage Range VOUT1 0.8 —4.5 V

Adjustable Reference Feedback

Voltage (VFB1)

VFB1 0.78 0.8 0.82 V

Feedback Input Bias Current

(IFB1)

IVFB1 —-1.5— nA

Output Voltage Tolerance Fixed

(VOUT1)

VOUT1 -2.5 ±0.3 +2.5 %Note 2

Line Regulation (VOUT1)V

LINE-REG — 0.2 — %/V VIN =VR+1V to 5.5V,

ILOAD = 100 mA

Load Regulation (VOUT1)V

LOAD-REG —0.2— %V

IN =V

R+1.5V, I

LOAD = 100 mA to

500 mA (Note 1)

Dropout Voltage VOUT1 VIN – VOUT1 — 280 — mV IOUT1 = 500 mA, VOUT1 =3.3V

(Note 5)

Internal Oscillator Frequency FOSC 1.6 2.0 2.4 MHz

Start Up Time TSS —0.5— msT

R = 10% to 90%

RDSon P-Channel RDSon-P — 450 — mΩIP=100 mA

RDSon N-Channel RDSon-N — 450 — mΩIN=100 mA

LX Pin Leakage Current ILX -1.0 ±0.01 1.0 μA SHDN = 0V, VIN = 5.5V, LX = 0V,

LX = 5.5V

Positive Current Limit Threshold +ILX(MAX) — 700 — mA

LDO Output (VOUT2)

Output Voltage Tolerance (VOUT2)V

OUT2 -2.5 ±0.3 +2.5 %Note 2

Temperature Coefficient TCVOUT — 25 — ppm/°C Note 3

Line Regulation ∆VOUT2/

∆VIN

-0.2 ±0.02 +0.2 %/V (VR+1V) ≤ VIN ≤ 5.5V

Load Regulation, VOUT2 ≥ 2.5V ∆VOUT2/

IOUT2

-0.75 -0.08 +0.75 %I

OUT2 = 0.1 mA to 300 mA (Note 4)

Load Regulation, VOUT2 < 2.5V ∆VOUT2/

IOUT2

-0.9 -0.18 +0.9 %I

OUT2 = 0.1 mA to 300 mA (Note 4)

Dropout Voltage VOUT2 > 2.5V VIN – VOUT2 — 137

205

300

500

mV IOUT2 = 200 mA (Note 5)

IOUT2 = 300 mA

Power Supply Rejection Ratio PSRR — 62 — dB f ≤ 100 Hz, IOUT1 = IOUT2 = 50 mA,

CIN = 0 µF

Output Noise eN — 1.8 — µV/(Hz)½f ≤ 1 kHz, IOUT2 =50mA,

SHDN1 =GND

DC CHARACTERISTICS (CONTINUED)

Electrical Characteristics: VIN1 =VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

= 4.7 µH, VOUT1 (ADJ) = 1.8V,

IOUT1 = 100 mA, IOUT2 = 0.1 mA TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C.

Parameters Sym Min Typ Max Units Conditions

Note 1: The Minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VRX + VDROPOUT, VRX = VR1 or VR2.

2: VRX is the regulator output voltage setting.

3: TCVOUT2 = ((VOUT2max – VOUT2min) * 106)/(VOUT2 * DT).

4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested

over a load range from 0.1 mA to the maximum specified output current.

5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its

nominal value measured at a 1V differential.

6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction

temperature and the thermal resistance from junction to air. (i.e. TA, TJ, θJA). Exceeding the maximum allowable power

dissipation causes the device to initiate thermal shutdown.

7: The integrated MOSFET switches have an integral diode from the LX pin to VIN, and from LX to PGND. In cases where

these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not

able to limit the junction temperature for these cases.

8: VIN1 and VIN2 are supplied by the same input source.

TC1303A/TC1303B/TC1303C/TC1304

Output Short Circuit Current

(Average)

IOUTsc2 — 240 — mA RLOAD2 ≤ 1Ω

Wake-Up Time (From SHDN2

mode), (VOUT2)

tWK —31100µsI

OUT1 = IOUT2 = 50 mA

Settling Time (From SHDN2

mode), (VOUT2)

tS— 100 — µs IOUT1 = IOUT2 = 50 mA

Power-Good (PG)

Voltage Range PG VPG 1.0

1.2

—5.5

5.5

A = 0°C to +70°C

TA = -40°C to +85°C

VIN ≤ 2.7 ISINK = 100 µA

PG Threshold High

(VOUT1 or VOUT2)

VTH_H —9496 % of

VOUTX

On Rising VOUT1 or VOUT2

VOUTX =V

OUT1 or VOUT2

PG Threshold Low

(VOUT1 or VOUT2)

VTH_L 89 92 — % of

VOUTX

On Falling VOUT1 or VOUT2

VOUTX =V

OUT1 or VOUT2

PG Threshold Hysteresis

(VOUT1 and VOUT2)

VTH_HYS —2—% of

VOUTX

VOUTX =V

OUT1 or VOUT2

PG Threshold Tempco ΔVTH/ΔT — 30 — ppm/°C

PG Delay tRPD — 165 — µs VOUT1 or VOUT2 =(V

TH + 100 mV)

to (VTH - 100 mV)

PG Active Time-out Period tRPU 140 262 560 ms VOUT1 or VOUT2 =V

TH - 100 mV

to VTH + 100 mV,

ISINK = 1.2 mA

PG Output Voltage Low PG_VOL ——0.2 VV

OUT1 or V OUT2 =V

TH - 100 mV,

IPG= 1.2 mA VIN2 >2.7V

IPG = 100 µA, 1.0V < VIN2 < 2.7V

PG Output Voltage High

(TC1303B only)

PG_VOH 0.9* VOUT2 —— VV

OUT1 or VOUT2 =V

TH + 100 mV

VOUT2 ≥ 1.8V, IPG = - 500 µA

VOUT2 < 1.8V,IPG = - 300 µA

DC CHARACTERISTICS (CONTINUED)

Electrical Characteristics: VIN1 =VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

= 4.7 µH, VOUT1 (ADJ) = 1.8V,

IOUT1 = 100 mA, IOUT2 = 0.1 mA TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C.

Parameters Sym Min Typ Max Units Conditions

Note 1: The Minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VRX + VDROPOUT, VRX = VR1 or VR2.

2: VRX is the regulator output voltage setting.

3: TCVOUT2 = ((VOUT2max – VOUT2min) * 106)/(VOUT2 * DT).

4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested

over a load range from 0.1 mA to the maximum specified output current.

5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its

nominal value measured at a 1V differential.

6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction

temperature and the thermal resistance from junction to air. (i.e. TA, TJ, θJA). Exceeding the maximum allowable power

dissipation causes the device to initiate thermal shutdown.

7: The integrated MOSFET switches have an integral diode from the LX pin to VIN, and from LX to PGND. In cases where

these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not

able to limit the junction temperature for these cases.

8: VIN1 and VIN2 are supplied by the same input source.

TC1303A/TC1303B/TC1303C/TC1304

TEMPERATURE SPECIFICATIONS

Electrical Specifications: Unless otherwise indicated, all limits are specified for: VIN = +2.7V to +5.5V

Parameters Sym Min Typ Max Units Conditions

Temperature Ranges

Operating Junction Temperature

Range

TJ-40 — +125 °C Steady state

Storage Temperature Range TA-65 — +150 °C

Maximum Junction Temperature TJ— — +150 °C Transient

Thermal Package Resistances

Thermal Resistance, 10L-DFN θJA — 41 — °C/W Typical 4-layer Board with

Internal Ground Plane and 2 Vias

in Thermal Pad

Thermal Resistance, 10L-MSOP θJA — 113 — °C/W Typical 4-layer Board with

Internal Ground Plane

TC1303A/TC1303B/TC1303C/TC1304

2.0 TYPICAL PERFORMANCE CURVES

Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

=4.7µH,

VOUT1 (ADJ) = 1.8V, TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA= +25°C. Adjustable- or fixed-

output voltage options can be used to generate the Typical Performance Characteristics.

FIGURE 2-1: IQ Switcher and LDO

Current vs. Ambient Temperature (TC1303A,B).

FIGURE 2-2: IQ Switcher and LDO

Current vs. Ambient Temperature

(TC1303C, TC1304).

FIGURE 2-3: IQ Switcher Current vs.

Ambient Temperature.

FIGURE 2-4: IQ LDO Current vs. Ambient

Temperature.

FIGURE 2-5: VOUT1 Output Efficiency vs.

Input Voltage (VOUT1 = 1.2V).

FIGURE 2-6: VOUT1 Output Efficiency vs.

IOUT1 (VOUT1 = 1.2V).

Note: The graphs and tables provided following this note are a statistical summary based on a limited number of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient Temperature (°C)

IQ Switcher and LDO (µA)

VIN = 3.6V

VIN = 4.2V

VIN = 5.5V

IOUT1 = IOUT2 = 0 mA SHDN1 = VIN2

SHDN2 = VIN2

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient Temperature (°C)

IQ Switcher and LDO (µA)

VIN = 5.5V

SHDN1 = VIN2

SHDN2 = VIN2

VIN = 4.2V

VIN = 3.6V

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient Temperature (°C)

IQ Switcher (µA)

VIN = 3.6V

VIN = 4.2V

VIN = 5.5V

IOUT1 = 0 mA

SHDN1 = VIN2

SHDN2 = AGND

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient Temperature (°C)

IQ LDO (µA)

VIN = 3.6V

VIN = 4.2V

VIN = 5.5V

IOUT2 = 0 mA

SHDN1 = AGND

SHDN2 = VIN2

100

2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5

Input Voltage (V)

VOUT1 Efficiency (%)

IOUT1 = 100 mA

IOUT1 = 250 mA

IOUT1 = 500 mA

SHDN1 = VIN2

SHDN2 = AGND

100

0.005 0.104 0.203 0.302 0.401 0.5

IOUT1 (A)

VOUT1 Efficiency(%)

VIN1 = 3.0V

VIN1 = 4.2V

VIN1 = 3.6V

SHDN1 = VIN2

SHDN2 = AGND

TC1303A/TC1303B/TC1303C/TC1304

Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

=4.7µH,

VOUT1 (ADJ) = 1.8V, TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA= +25°C. Adjustable- or fixed-

output voltage options can be used to generate the Typical Performance Characteristics.

FIGURE 2-7: VOUT1 Output Efficiency vs.

Input Voltage (VOUT1 = 1.8V).

FIGURE 2-8: VOUT1 Output Efficiency vs.

IOUT1 (VOUT1 = 1.8V).

FIGURE 2-9: VOUT1 Output Efficiency vs.

Input Voltage (VOUT1 = 3.3V).

FIGURE 2-10: VOUT1 Output Efficiency vs.

IOUT1 (VOUT1 = 3.3V).

FIGURE 2-11: VOUT1 vs. IOUT1

(VOUT1 = 1.2V).

FIGURE 2-12: VOUT1 vs. IOUT1

(VOUT1 = 1.8V).

100

2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5

Input Voltage (V)

VOUT1 Efficiency(%)

IOUT1 = 100 mA

IOUT1 = 250 mA

IOUT1 = 500 mA

SHDN1 = VIN2

SHDN2 = AGND

100

0.005 0.104 0.203 0.302 0.401 0.5

IOUT1 (A)

VOUT1 Efficiency(%)

SHDN1 = VIN2

SHDN2 = AGND

VIN = 3.0V

VIN = 4.2V

VIN = 3.6V

100

3.60 3.92 4.23 4.55 4.87 5.18 5.50

Input Voltage (V)

VOUT1 Efficiency (%)

IOUT1 = 100 mA

IOUT1 = 250 mA

IOUT1 = 500 mA

SHDN1 = VIN2

SHDN2 = AGND

100

0.005 0.104 0.203 0.302 0.401 0.5

IOUT1 (A)

VOUT1 Efficiency (%)

VIN1 = 5.5V

SHDN1 = VIN2

SHDN2 = AGND

VIN1 = 4.2V

VIN1 = 3.6V

1.19

1.194

1.198

1.202

1.206

1.21

0.005 0.104 0.203 0.302 0.401 0.5

IOUT1 (A)

VOUT1 (V)

SHDN1 = VIN2

SHDN2 = AGND

VIN1 = 3.6V

1.79

1.795

1.8

1.805

1.81

1.815

1.82

0.005 0.104 0.203 0.302 0.401 0.5

IOUT1 (A)

VOUT1 (V)

SHDN1 = VIN2

SHDN2 = AGND

VIN1 = 3.6V

TC1303A/TC1303B/TC1303C/TC1304

Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

=4.7µH,

VOUT1 (ADJ) = 1.8V, TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA= +25°C. Adjustable- or fixed-

output voltage options can be used to generate the Typical Performance Characteristics.

FIGURE 2-13: VOUT1 vs. IOUT1

(VOUT1 = 3.3V).

FIGURE 2-14: VOUT1 Switching Fre quency

vs. Input Voltage.

FIGURE 2-15: VOUT1 Switching Fre quency

vs. Ambient Temperature.

FIGURE 2-16: VOUT1 Adjustable Feedback

Voltage vs. Ambient Temperature.

FIGURE 2-17: VOUT1 Switch Resistance

vs. Input Voltage.

FIGURE 2-18: VOUT1 Switch Resistance

vs. Ambient Temperature.

3.2

3.24

3.28

3.32

3.36

3.4

0.005 0.104 0.203 0.302 0.401 0.5

IOUT1 (A)

VOUT1 (V)

SHDN1 = VIN2

SHDN2 = AGND

VIN1 = 4.2V

1.90

1.95

2.00

2.05

2.10

2.15

2.20

2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5

Input Voltage (V)

VOUT1 Frequency (MHz)

SHDN1 = VIN2

SHDN2 = AGND

1.90

1.92

1.94

1.96

1.98

2.00

-40

-25

-10

110

125

Ambient Temperature (°C)

VOUT1 Frequency (MHz)

SHDN1 = VIN2

SHDN2 = AGND

0.790

0.795

0.800

0.805

0.810

0.815

0.820

-40

-25

-10

110

125

Ambient Temperature (°C)

VOUT1 FB Voltage (V)

SHDN1 = VIN2

SHDN2 = AGND

VIN1 = 3.6V

0.3

0.35

0.4

0.45

0.5

0.55

0.6

3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5

Input Voltage (V)

VOUT1 Switch Resistance ()

SHDN1 = VIN2

SHDN2 = AGND

TA = 25 °C

N-Channel

P-Channel

0.3

0.35

0.4

0.45

0.5

0.55

0.6

0.65

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient Temperature (°C)

VOUT1 Switch Resistance ()

SHDN1 = VIN2

SHDN2 = AGND

VIN1 = 3.6V

N-Channel

P-Channel

TC1303A/TC1303B/TC1303C/TC1304

Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

=4.7µH,

VOUT1 (ADJ) = 1.8V, TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA= +25°C. Adjustable- or fixed-

output voltage options can be used to generate the Typical Performance Characteristics.

FIGURE 2-19: VOUT1 Dropout Voltage vs.

Ambient Temperature.

FIGURE 2-20: VOUT1 and VOUT2 Heavy

Load Switching Waveforms vs. Time.

FIGURE 2-21: VOUT1 and VOUT2 Light

Load Switching Waveforms vs. Time.

FIGURE 2-22: VOUT2 Output Voltage vs.

Input Voltage (VOUT2 = 1.5V).

FIGURE 2-23: VOUT2 Output Voltage vs.

Input Voltage (VOUT2 = 1.8V).

FIGURE 2-24: VOUT2 Output Voltage vs.

Input Voltage (VOUT2 = 2.5V).

0.1

0.15

0.2

0.25

0.3

0.35

0.4

-40

-25

-10

110

125

Ambient Temperature (°C)

VOUT1 Dropout Voltage (V)

SHDN1 = VIN2

SHDN2 = AGND

VOUT1

= 3.3

IOUT1

= 500 mA

1.482

1.484

1.486

1.488

1.49

1.492

2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5

Input Voltage (V)

VOUT2 Output Voltage(V)

= - 40°C

= + 25°C

= + 85°C

IOUT2 = 150 mA

SHDN1 = AGND

SHDN2 = VIN2

1.792

1.794

1.796

1.798

1.800

1.802

2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5

Input Voltage (V)

VOUT2 Output Voltage (V)

= - 40°C

= + 25°C

= + 85°C

IOUT2 = 150 mA SHDN1 = AGND

SHDN2 = VIN2

2.496

2.498

2.500

2.502

2.504

2.506

2.508

3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5

Input Voltage (V)

VOUT2 Output Voltage (V)

= - 40°C

= + 25°C

= + 85°C

IOUT2 = 150 mA SHDN1 = AGND

SHDN2 = VIN2

TC1303A/TC1303B/TC1303C/TC1304

Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

=4.7µH,

VOUT1 (ADJ) = 1.8V, TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA= +25°C. Adjustable- or fixed-

output voltage options can be used to generate the Typical Performance Characteristics.

FIGURE 2-25: VOUT2 Output Voltage vs.

Input Voltage (VOUT2 = 3.3 V).

FIGURE 2-26: VOUT2 Dropout Voltage vs.

Ambient Temperature (VOUT2 = 2.5V).

FIGURE 2-27: VOUT2 Dropout Voltage vs.

Ambient Temperature (VOUT2 = 3.3V).

FIGURE 2-28: VOUT2 Line Regulation vs.

Ambient Temperature.

FIGURE 2-29: VOUT2 Load Regulation vs.

Ambient Temperature.

FIGURE 2-30: PG Active Delay Time-out

vs. Ambient Temperature.

3.292

3.293

3.294

3.295

3.296

3.297

3.298

3.60 3.92 4.23 4.55 4.87 5.18 5.50

Input Voltage (V)

VOUT2 Output Voltage (V)

= - 40°C

= + 25°C

= + 85°C

IOUT2 = 150 mA SHDN1 = AGND

SHDN2 = VIN2

0.05

0.10

0.15

0.20

0.25

0.30

-40

-25

-10

110

125

Ambient Temperature (°C)

VOUT2 Dropout Voltage (V)

IOUT2 = 200 mA

IOUT2 = 300 mA

SHDN1 = AGND

SHDN2 = VIN2

0.0

0.1

0.2

0.3

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient Temperature (°C)

VOUT2 Dropout Voltage (V)

IOUT2 = 200 mA

SHDN1 = AGND

SHDN2 = VIN2

IOUT2 = 300 mA

-0.035

-0.030

-0.025

-0.020

-0.015

-0.010

-0.005

0.000

0.005

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient Temperature (°C)

VOUT2 Line Regulation (%/V)

VOUT2

= 3.3V

IOUT2 = 100 µA

SHDN1 = AGND

SHDN2 = VIN2

VOUT2

= 2.5V

VOUT2

= 1.5V

-0.4

-0.3

-0.2

-0.1

0.0

0.1

-40

-25

-10

110

125

Ambient Temperature (°C)

VOUT2 Load Regulation (%)

VOUT2

= 3.3V

VIN2 = 3.6V SHDN1 = AGND

SHDN2 = VIN2

VOUT2

= 2.6V

VOUT2

= 1.5V

200

225

250

275

300

325

350

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient temperature (°C)

PG Active Delay Time (ms)

SHDN1 = VIN2

SHDN2 = VIN2

VIN = 3.6V

TC1303A/TC1303B/TC1303C/TC1304

Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

=4.7µH,

VOUT1 (ADJ) = 1.8V, TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA= +25°C. Adjustable- or fixed-

output voltage options can be used to generate the Typical Performance Characteristics.

FIGURE 2-31: PG Threshold Voltage vs.

Ambient Temperature.

FIGURE 2-32: PG Output Voltage Level

Low vs. Ambient Temperature.

FIGURE 2-33: PG Output Voltage Level

High vs. Ambient Temperature.

FIGURE 2-34: VOUT2 Power Supply Ripple

Rejection vs. Frequency.

FIGURE 2-35: VOUT2 Noise vs. Frequency.

FIGURE 2-36: VOUT1 Load Step Response

vs. Time.

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient Temperature (°C)

PG Threshold (% of VOUT2)

SHDN1 = VIN2

SHDN2 = VIN2

VIN = 3.6V

PG Threshold Hi

PG Threshold Low

0.01

0.012

0.014

0.016

0.018

0.02

-40

-25

-10

110

125

Ambient Temperature (°C)

PG VOL (V)

VIN = 3.6V

IOL = 1.2 mA

SHDN1 = VIN2

SHDN2 = VIN2

0.0

0.5

1.0

1.5

2.0

2.5

3.0

-40 -25 -10 5 20 35 50 65 80 95 110 125

Ambient Temperature (°C)

PG VOH (V)

VIN = 3.6V

IOH = 500 µA

VOUT2 = 2.8V

VOUT2 = 2.5V

VOUT2 = 1.5V

SHDN1 = VIN2

SHDN2 = VIN2

-80

-70

-60

-50

-40

-30

-20

-10

0.01 0.1 1 10 100 1000

Frequency (kHz)

VOUT2 PSRR (dB)

SHDN1 = GND

VOUT2 = 1.5V

IOUT2 = 30 mA

CIN = 0 µF

COUT2 = 1.0 µF

COUT2 = 4.7 µF

0.01

0.1

0.01 0.1 1 10 100 1000 10000

Frequency (kHz)

VOUT2 Noise (μV/¥Hz)

SHDN1 = AGND

SHDN2 = VIN2

VIN = 3.6V

VOUT2 = 2.5V

IOUT2 = 50 mA

TC1303A/TC1303B/TC1303C/TC1304

Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

=4.7µH,

VOUT1 (ADJ) = 1.8V, TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA= +25°C. Adjustable- or fixed-

output voltage options can be used to generate the Typical Performance Characteristics.

FIGURE 2-37: VOUT2 Load Step Response

vs. Time.

FIGURE 2-38: VOUT1 and VOUT2 Line Step

Response vs. Time.

FIGURE 2-39: VOUT1 and VOUT2 Start-up

Waveforms.

FIGURE 2-40: VOUT1 and VOUT2 Shutdown

Waveforms.

FIGURE 2-41: Power-Good Output Timing.

FIGURE 2-42: Start-up Waveforms

(TC1304).

TC1303A/TC1303B/TC1303C/TC1304

Note: Unless otherwise indicated, VIN1 = VIN2 = SHDN1,2 = 3.6V, COUT1 =C

IN = 4.7 µF, COUT2 =1µF, L

=4.7µH,

VOUT1 (ADJ) = 1.8V, TA= +25°C. Boldface specifications apply over the TA range of -40°C to +85°C. TA= +25°C. Adjustable- or fixed-

output voltage options can be used to generate the Typical Performance Characteristics.

FIGURE 2-43: Shutdown Waveforms

(TC1304).

TC1303A/TC1303B/TC1303C/TC1304

3.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

3.1 TC1303 LDO Shutdown Input Pin

(SHDN2)

SHDN2 is a logic-level input used to turn the LDO

Regulator on and off. A logic-high (> 45% of VIN), will

enable the regulator output. A logic-low (< 15% of VIN)

will ensure that the output is turned off.

3.2 TC1304 Shutdown Input Pin

(SHDN)

SHDN is a logic-level input used to initiate the

sequencing of the LDO output, then the buck regulator

output. A logic-high (> 45% of VIN), will enable the

regulator outputs. A logic-low (< 15% of VIN) will ensure

that the outputs are turned off.

3.3 LDO Input Voltage Pin (VIN2)

VIN2 is a LDO power input supply pin. Connect variable

input voltage source to VIN2. Connect VIN1 and VIN2

together with board traces as short as possible. VIN2

provides the input voltage for the LDO. An additional

capacitor can be added to lower the LDO regulator

input ripple voltage.

3.4 LDO Output Voltage Pin (VOUT2)

VOUT2 is a regulated LDO output voltage pin. Connect

a 1 µF or larger capacitor to VOUT2 and AGND for proper

operation.

3.5 Power-Good Output Pin (PG)

PG is an output level indicating that VOUT2 (LDO) is

within 94% of regulation. The PG output is configured

as a push-pull for the TC1303B and open-drain output

for the TC1303A, TC1303C and TC1304.

3.6 Analog Ground Pin (AGND)

AGND is the analog ground connection. Tie AGND to the

analog portion of the ground plane (AGND). See the

physical layout information in Section 5.0 “Application

Circuits/Issues” for grounding recommendations.

3.7 Buck Regulator Output Sense Pin

(VFB/VOUT1)

For VOUT1 adjustable-output voltage options, connect

the center of the output voltage divider to the VFB pin.

For fixed-output voltage options, connect the output of

the buck regulator to this pin (VOUT1).

Pin No.

Symbol

DescriptionTC1303 TC1304

MSOP, DFN MSOP, DFN

1 SHDN2 — Active Low Shutdown Input for LDO Output Pin

1 — SHDN Active Low Shutdown Input both Buck Regulator Output and LDO Output.

Initiates sequencing up and down

IN2 VIN2 Analog Input Supply Voltage Pin

OUT2 VOUT2 LDO Output Voltage Pin

4 PG PG Power-Good Output Pin

GND AGND Analog Ground Pin

FB/VOUT1 VFB/VOUT1 Buck Feedback Voltage (Adjustable Version) / Buck Output Voltage

(Fixed Version) Pin

7 SHDN1 — Active Low Shutdown Input for Buck Regulator Output Pin

7—A

GND Analog Ground Pin

IN1 VIN1 Buck Regulator Input Voltage Pin

XLXBuck Inductor Output Pin

10 PGND PGND Power Ground Pin

11 EP EP Exposed Pad - For the DFN package, the center exposed pad is a thermal

path to remove heat from the device. Electrically this pad is at ground

potential and should be connected to AGND.

TC1303A/TC1303B/TC1303C/TC1304

3.8 Buck Regulator Shutdown Input

Pin (SHDN1)

SHDN1 is a logic-level input used to turn the buck

regulator on and off. A logic-high (> 45% of VIN), will

enable the regulator output. A logic-low (< 15% of VIN)

will ensure that the output is turned off.

3.9 Buck Regulator Input Voltage Pin

(VIN1)

VIN1 is the buck regulator power input supply pin.

Connect a variable input voltage source to VIN1.

Connect VIN1 and VIN2 together with board traces as

short as possible.

3.10 Buck Inductor Output Pin (LX)

Connect LX directly to the buck inductor. This pin

carries large signal-level current; all connections

should be made as short as possible.

3.11 Power Ground Pin (PGND)

Connect all large-signal level ground returns to PGND.

These large-signal, level ground traces should have a

small loop area and length to prevent coupling of

switching noise to sensitive traces. Please see the

physical layout information supplied in Section 5.0

“Application Circuits/Issues” for grounding

recommendations.

3.12 Exposed Pad (EP)

For the DFN package, connect the EP to AGND, with

vias into the AGND plane.

TC1303A/TC1303B/TC1303C/TC1304

4.0 DETAILED DESCRIPTION

4.1 Device Overview

The TC1303/TC1304 combines a 500 mA

synchronous buck regulator with a 300 mA LDO and a

power-good output. This unique combination provides

a small, low-cost solution for applications that require

two or more voltage rails. The buck regulator can

deliver high-output current over a wide range of input-

to-output voltage ratios while maintaining high

efficiency. This is typically used for the lower-voltage,

high-current processor core. The LDO is a minimal

parts-count solution (single-output capacitor), providing

a regulated voltage for an auxiliary rail. The typical LDO

dropout voltage (137 mV @ 200 mA) allows the use of

very low input-to-output LDO differential voltages,

minimizing the power loss internal to the LDO pass

transistor. A power-good output is provided, indicating

that the buck regulator output, the LDO output or both

outputs are in regulation. Additional features include

independent shutdown inputs (TC1303), UVLO, output

voltage sequencing (TC1304), overcurrent and

overtemperature shutdown.

4.2 Synchronous Buck Regulator

The synchronous buck regulator is capable of

supplying a 500 mA continuous output current over a

wide range of input and output voltages. The output

voltage range is from 0.8V (minimum) to 4.5V

(maximum). The regulator operates in three different

modes, automatically selecting the most efficient mode

of operation. During heavy load conditions, the

TC1303/TC1304 buck converter operates at a high,

fixed frequency (2.0 MHz) using current mode control.

This minimizes output ripple and noise (less than 8 mV

peak-to-peak ripple) while maintaining high efficiency

(typically > 90%). For standby or light load applications,

the buck regulator will automatically switch to a power-

saving Pulse Frequency Modulation (PFM) mode. This

minimizes the quiescent current draw on the battery,

while keeping the buck output voltage in regulation.

The typical buck PFM mode current is 38 µA. The buck

regulator is capable of operating at 100% duty cycle,

minimizing the voltage drop from input-to-output for

wide input, battery-powered applications. For fixed-

output voltage applications, the feedback divider and

control loop compensation components are integrated,

eliminating the need for external components. The

buck regulator output is protected against overcurrent,

short circuit and overtemperature. While shut down, the

synchronous buck N-channel and P-channel switches

are off, so the LX pin is in a high-impedance state (this

allows for connecting a source on the output of the

buck regulator as long as its voltage does not exceed

the input voltage).

4.2.1 FIXED-FREQUENCY PWM MODE

While operating in Pulse Width Modulation (PWM)

mode, the TC1303/TC1304 buck regulator switches at

a fixed, 2.0 MHz frequency. The PWM mode is suited

for higher load current operation, maintaining low

output noise and high conversion efficiency. PFM-to-

PWM mode transition is initiated for any of the following

conditions:

• Continuous inductor current is sensed

• Inductor peak current exceeds 100 mA

• The buck regulator output voltage has dropped

out of regulation (step load has occurred)

The typical PFM-to-PWM threshold is 80 mA.

4.2.2 PFM MODE

PFM mode is entered when the output load on the buck

regulator is very light. Once detected, the converter

enters the PFM mode automatically and begins to skip

pulses to minimize unnecessary quiescent current

draw by reducing the number of switching cycles per

second. The typical quiescent current for the switching

regulator is less than 35 µA. The transition from PWM

to PFM mode occurs when discontinuous inductor

current is sensed or the peak inductor current is less

than 60 mA (typical). The typical PWM to PFM mode

threshold is 30 mA. For low input-to-output differential

voltages, the PWM-to-PFM mode threshold can be low

due to the lack of ripple current. It is recommended that

VIN1 be one volt greater than VOUT1 for PWM-to-PFM

transitions.

4.3 Low Drop Out Regulator (LDO)

The LDO output is a 300 mA low-dropout linear

regulator that provides a regulated output voltage with

a single 1 µF external capacitor. The output voltage is

available in fixed options only, ranging from 1.5V to

3.3V. The LDO is stable using ceramic output

capacitors that inherently provide lower output noise

and reduce the size and cost of the regulator solution.

The quiescent current consumed by the LDO output is

typically less than 40 µA, with a typical dropout voltage

of 137 mV at 200 mA. While operating in Dropout

mode, the LDO quiescent current will increase,

minimizing the necessary voltage differential needed

for the LDO output to maintain regulation. The LDO

output is protected against overcurrent and

overtemperature conditions.

TC1303A/TC1303B/TC1303C/TC1304

4.4 Power-Good

A Power-Good (PG) output signal is generated based

off of the buck regulator output voltage (VOUT1), the

LDO output voltage (VOUT2) or the combination of both

outputs. A fixed delay time of approximately 262 ms is

generated once the monitored output voltage is above

the power-good threshold (typically 94% of VOUTX). As

the monitored output voltage falls out of regulation, the

falling PG threshold is typically 92% of the output

voltage. The PG output signal is pulled up to the output

voltage, indicating that power is good and pulled low,

indicating that the output is out of regulation. The

typical quiescent current draw for power-good circuitry

is less than 10 µA.

If the monitored output voltage falls below the power-

good threshold, the power-good output will transition to

the Low state. The power-good circuitry has a 165 µs

delay when detecting a falling output voltage. This

helps to increase the noise immunity of the power-good

output, avoiding false triggering of the PG signal during

line and load transients.

FIGURE 4-1: Power-Good Timing.

4.5 Power Good Output Options

There are three monitoring options for the TC1303

family.

For the TC1303A, only the buck regulator output

voltage (VOUT1) is monitored. The PG output signal

depends only on VOUT1.

For the TC1303B, only the LDO output voltage (VOUT2)

is monitored. The PG output signal depends only on

VOUT2.

For the TC1303C and TC1304, both the buck regulator

output voltage and LDO output voltage are monitored.

If either one of the outputs fall out of regulation, the PG

will be low. Only if both VOUT1 and VOUT2 are within the

PG voltage threshold limits will the PG output be high.

For the TC1303A,C and TC1304, the PG output pin is

open drain and can be pulled up to any level within the

given absolute maximum ratings (AGND - 0.3V) to (VIN

+ 0.3V).

TABLE 4-1: PG AVAILABLE OPTIONS

tRPU

tRPD

VTH_H

VOUT1

PG VOL

VOH

or VOUT2

Part

Number

PG Output

Buck

(VOUT1)

Output

LDO

(VOUT2)

PG Output

Type

TC1303A Yes No Open-Drain

TC1303B No Yes Push-Pull

(VOUT2)

TC1303C Yes Yes Open-Drain

TC1304 Yes Yes Open-Drain

TC1303A/TC1303B/TC1303C/TC1304

4.6 TC1304 Sequencing

The TC1304 device features an integrated sequencing

option. A sequencing circuit using only the SHDN input,

(Pin1), will turn on the LDO output (VOUT2) and delay

the turn on of the Buck Regulator output (VOUT1) until

the LDO output is in regulation. During power-down,

the sequencing circuit will turn off the Buck Regulator

output prior to turning off LDO output.

FIGURE 4-2: TC1304 Sequencing Circuit.

FIGURE 4-3: TC1304 Power-up Timing

from SHDN.

4.7 Soft Start

Both outputs of the TC1303/TC1304 are controlled

during start-up. Less than 1% of VOUT1 or VOUT2

overshoot is observed during start-up from VIN rising

above the UVLO voltage or either SHDN1 or SHDN2

being enabled.

4.8 Overtemperature Protection

The TC1303/TC1304 has an integrated overtempera-

ture protection circuit that monitors the device junction

temperature and shuts the device off if the junction

temperature exceeds the typical 165°C threshold. If the

overtemperature threshold is reached, the soft start is

reset so that, once the junction temperature cools to

approximately 155°C, the device will automatically

restart.

Enable

VOUT2

VOUT1

–

160 µs Delay*

92% of VOUT2

92% of VOUT1

To PG

Delay CKT.

SHDN

* 160 µs delay on trailing edge

VIN1/VIN2

VOUT1

VOUT2

Power Good

Power Up Timing From SHDN

300 ms

tWK + tS

500 µs

TC1304

SHDN

TC1303A/TC1303B/TC1303C/TC1304

NOTES:

TC1303A/TC1303B/TC1303C/TC1304

5.0 APPLICATION CIRCUITS/

ISSUES

5.1 Typical Applications

The TC1303/TC1304 500 mA buck regulator + 300 mA

LDO with power-good operates over a wide input volt-

age range (2.7V to 5.5V) and is ideal for single-cell Li-

Ion battery-powered applications, USB-powered

applications, three-cell NiMH or NiCd applications and

3V to 5V regulated input applications. The 10-pin

MSOP and 3x3 DFN packages provide a small footprint

with minimal external components.

5.2 Fixed Output Application

A typical VOUT1 fixed-output voltage application is

shown in “Typical Application Circuits”. A 4.7 µF

VIN1 ceramic input capacitor, 4.7 µF VOUT1 ceramic

capacitor, 1.0 µF ceramic VOUT2 capacitor and 4.7 µH

inductor make up the entire external component

solution for this dual-output application. No external

dividers or compensation components are necessary.

For this application, the input voltage range is 2.7V to

4.2V, VOUT1 = 1.5V at 500 mA, while VOUT2 =2.5V at

300 mA.

5.3 Adjustable Output Application

A typical VOUT1 adjustable output application is also

shown in “Typical Application Circuits”. For this

application, the buck regulator output voltage is

adjustable by using two external resistors as a voltage

divider. For adjustable-output voltages, it is

recommended that the top resistor divider value be

200 kΩ. The bottom resistor divider can be calculated

using the following formula:

EQUATION 5-1:

Example:

For adjustable-output applications, an additional R-C

compensation is necessary for the buck regulator

control loop stability. Recommended values are:

An additional VIN2 capacitor can be added to reduce

high-frequency noise on the LDO input voltage pin

(VIN2). This additional capacitor (1 µF on page 5) is not

necessary for typical applications.

5.4 Input and Output Capacitor

Selection

As with all buck-derived dc-dc switching regulators, the

input current is pulled from the source in pulses. This

places a burden on the TC1303/TC1304 input filter

capacitor. In most applications, a minimum of 4.7 µF is

recommended on VIN1 (buck regulator input voltage

pin). In applications that have high source impedance,

or have long leads, (10 inches) connecting to the input

source, additional capacitance should be used. The

capacitor type can be electrolytic (aluminum, tantalum,

POSCAP, OSCON) or ceramic. For most portable

electronic applications, ceramic capacitors are

preferred due to their small size and low cost.

For applications that require very low noise on the LDO

output, an additional capacitor (typically 1 µF) can be

added to the VIN2 pin (LDO input voltage pin).

Low ESR electrolytic or ceramic can be used for the

buck regulator output capacitor. Again, ceramic is

recommended because of its physical attributes and

cost. For most applications, a 4.7 µF is recommended.

Refer to Tabl e 5 -1 for recommended values. Larger

capacitors (up to 22 µF) can be used. There are some

advantages in load step performance when using

larger value capacitors. Ceramic materials X7R and

X5R have low temperature coefficients and are well

within the acceptable ESR range required.

TABLE 5-1: TC1303A, TC1303B, TC1303C,

TC1304 RECOMMENDED

CAPACITOR VALUES

RTOP = 200 kΩ

VOUT1 =2.1V

VFB =0.8V

RBOT = 200 kΩ x (0.8V/(2.1V – 0.8V))

RBOT = 123 kΩ (Standard Value = 121 kΩ)

RCOMP =4.99kΩ

CCOMP =33pF

RBOT RTOP VFB

VOUT1 VFB

–

--------------------------------

⎝⎠

⎛⎞

C(VIN1)C(V

IN2)C

OUT1 COUT2

min 4.7 µF none 4.7 µF 1 µF

max none none 22 µF 10 µF

TC1303A/TC1303B/TC1303C/TC1304

5.5 Inductor Selection

For most applications, a 4.7 µH inductor is recom-

mended to minimize noise. There are many different

magnetic core materials and package options to select

from. That decision is based on size, cost and accept-

able radiated energy levels. Toroid and shielded ferrite

pot cores will have low radiated energy, but tend to be

larger and higher is cost. With a typical 2.0 MHz

switching frequency, the inductor ripple current can be

calculated based on the following formulas.

EQUATION 5-2:

Duty cycle represents the percentage of switch-on

time.

EQUATION 5-3:

The inductor ac ripple current can be calculated using

the following relationship:

EQUATION 5-4:

Solving for ∆IL= yields:

EQUATION 5-5:

When considering inductor ratings, the maximum DC

current rating of the inductor should be at least equal to

the maximum buck regulator load current (IOUT1), plus

one half of the peak-to-peak inductor ripple current (1/

2*ΔIL). The inductor DC resistance can add to the

buck converter I2R losses. A rating of less than 200 mΩ

is recommended. Overall efficiency will be improved by

using lower DC resistance inductors.

TABLE 5-2: TC1303A, TC1303B, TC1303C,

TC1304 RECOMMENDED

INDUCTOR VALUES

5.6 Thermal Calculations

5.6.1 BUCK REGULATOR OUTPUT

(VOUT1)

The TC1303/TC1304 is available in two different 10-pin

packages (MSOP and 3x3 DFN). By calculating the

power dissipation and applying the package thermal

resistance, (θJA), the junction temperature is estimated.

The maximum continuous junction temperature rating

for the TC1303/TC1304 is +125°C.

To quickly estimate the internal power dissipation for

the switching buck regulator, an empirical calculation

using measured efficiency can be used. Given the

measured efficiency (Section 2.0 “Typical Perfor-

mance Curves”), the internal power dissipation is

estimated below:

EQUATION 5-6:

The first term is equal to the input power (definition of

efficiency, POUT/PIN = Efficiency). The second term is

equal to the delivered power. The difference is internal

power dissipation. This is an estimate assuming that

most of the power lost is internal to the TC1303B.

There is some percentage of power lost in the buck

inductor, with very little loss in the input and output

capacitors.

DutyCycle VOUT

VIN

-------------=

TON DutyCycle 1

FSW

----------

Where:

FSW = Switching Frequency.

VLL

--------

Where:

VL= voltage across the inductor (VIN – VOUT)

∆t = on-time of P-channel MOSFET

ILVL

------

Part

Number

Value

(µH)

DCR

Ω

(MAX)

MAX

IDC (A)

Size

WxLxH (mm)

Coiltronics®

SD10 2.2 0.091 1.35 5.2, 5.2, 1.0 max.

SD10 3.3 0.108 1.24 5.2, 5.2, 1.0 max.

SD10 4.7 0.154 1.04 5.2, 5.2, 1.0 max.

Coiltronics

SD12 2.2 0.075 1.80 5.2, 5.2, 1.2 max.

SD12 3.3 0.104 1.42 5.2, 5.2, 1.2 max.

SD12 4.7 0.118 1.29 5.2, 5.2, 1.2 max.

Sumida Corporation®

CMD411 2.2 0.116 0.950 4.4, 5.8, 1.2 max.

CMD411 3.3 0.174 0.770 4.4, 5.8, 1.2 max.

CMD411 4.7 0.216 0.750 4.4, 5.8, 1.2 max.

Coilcraft®

1008PS 4.7 0.35 1.0 3.8, 3.8, 2.74 max.

1812PS 4.7 0.11 1.15 5.9, 5.0, 3.81 max

VOUT1 IOUT1

Efficiency

-------------------------------------

⎝⎠

⎛⎞

VOUT1 IOUT1

()–PDissipation

TC1303A/TC1303B/TC1303C/TC1304

As an example, for a 3.6V input, 1.8V output with a load

of 400 mA, the efficiency taken from Figure 2-8 is

approximately 84%. The internal power dissipation is

approximately 137 mW.

5.6.2 LDO OUTPUT (VOUT2)

The internal power dissipation within the TC1303/

TC1304 LDO is a function of input voltage, output

voltage and output current. Equation 5-7 can be used

to calculate the internal power dissipation for the LDO.

EQUATION 5-7:

The maximum power dissipation capability for a

package can be calculated given the junction-to-

ambient thermal resistance and the maximum ambient

temperature for the application. The following equation

can be used to determine the package’s maximum

internal power dissipation.

5.6.3 LDO POWER DISSIPATION

EXAMPLE

5.7 PCB Layout Information

Some basic design guidelines should be used when

physically placing the TC1303/TC1304 on a Printed

Circuit Board (PCB). The TC1303/TC1304 has two

ground pins, identified as AGND (analog ground) and

PGND (power ground). By separating grounds, it is

possible to minimize the switching frequency noise on

the LDO output. The first priority, while placing external

components on the board, is the input capacitor (CIN1).

Wiring should be short and wide; the input current for

the TC1303/TC1304 can be as high as 800 mA. The

next priority would be the buck regulator output

capacitor (COUT1) and inductor (L1). All three of these

components are placed near their respective pins to

minimize trace length. The CIN1 and COUT1 capacitor

returns are connected closely together at the PGND

plane. The LDO optional input capacitor (CIN2) and

LDO output capacitor COUT2 are returned to the AGND

plane. The analog ground plane and power ground

plane are connected at one point (shown near L1). All

other signals (SHDN1, SHDN2, feedback in the

adjustable-output case) should be referenced to AGND

and have the AGND plane underneath them.

FIGURE 5-1: Component Placement,

Fixed 10-Pin MSO P.

There will be some difference in layout for the 10-pin

DFN package due to the thermal pad. A typical fixed-

output DFN layout is shown below. For the DFN layout,

the VIN1 to VIN2 connection is routed on the bottom of

the board around the TC1303/TC1304 thermal pad.

FIGURE 5-2: Component Placement,

Fixed 10-Pin DFN .

Input Voltage

VIN =5V±10%

LDO Output Voltage and Current

VOUT =3.3V

IOUT = 300 mA

Internal Power Dissipation

PLDO(MAX) =(V

IN(MAX) – VOUT2(MIN)) x IOUT2(MAX)

PLDO = (5.5V – 0.975 x 3.3V) x 300 mA

PLDO = 684.8 mW

PLDO VIN MAX)()

VOUT2 MIN()

–()IOUT2 MAX)()

Where:

PLDO = LDO Pass device internal power

dissipation

VIN(MAX) = Maximum input voltage

VOUT(MIN) = LDO minimum output voltage

TC1303B

+VOUT1

PGND

+VIN1

AGND

+VOUT2

COUT1

CIN2

COUT2

CIN1

PGND Plane

AGND Plane

AGND to PGND

+VIN2

* CIN2 Optional

- Via

+VOUT1

PGND

+VIN1

AGND

+VOUT2

COUT1

CIN2

COUT2

CIN1

PGND Plane

AGND Plane

AGND to PGND

PGND

* CIN2 Optional

+VIN2

TC1303B

- Via

TC1303A/TC1303B/TC1303C/TC1304

5.8 Design Example

VOUT1 = 2.0V @ 500 mA

VOUT2 = 3.3V @ 300 mA

VIN = 5V±10%

L = 4.7µH

Calculate PWM mode inductor ripple current

Nominal Duty

Cycle = 2.0V/5.0V = 40%

P-channel

Switch-on time = 0.40 x 1/(2 MHz) = 200 ns

VL=(V

IN-VOUT1)=3V

∆IL=(V

L/L) x TON =128mA

Peak inductor current:

IL(PK) =I

OUT1+1/2∆IL= 564 mA

Switcher power loss:

Use efficiency estimate for 1.8V from Figure 2-8

Efficiency = 84%, PDISS1 =190mW

Resistor Divider:

RTOP =200kΩ

RBOT =133kΩ

LDO Output:

PDISS2 =(V

IN(MAX) –

VOUT2(MIN))xI

OUT2(MAX)

PDISS2 = (5.5V – (0.975) x 3.3V) x 300 mA

PDISS2 =684.8mW

Total

Dissipation = 190 mW + 685 mW = 874 mW

Junction Temp Rise and Maximum Ambient

Operating Temperature Calculations

10-Pin MSOP (4-Layer Board with internal Planes)

RθJA =113°C/Watt

Junction Temp.

Rise = 874 mW x 113° C/Watt = 98.8°C

Max. Ambient

Temperature = 125°C - 98.8°C

Max. Ambient

Temperature = 26.3°C

10-Pin DFN

RθJA = 41° C/Watt (4-Layer Board with

internal planes and 2 vias)

Junction Temp.

Rise = 874 mW x 41° C/Watt = 35.8°C

Max. Ambient

Temperature = 125°C - 35.8°C

Max. Ambient

Temperature = 89.2°C

This is above the +85°C max. ambient temperature.

TC1303A/TC1303B/TC1303C/TC1304

6.0 PACKAGING INFORMATION

6.1 Package Marking Information

Second letter represents VOUT1 configuration: Third letter represents VOUT2 configuration:

Fourth letter represents +50 mV Increments:

10-Lead MSOP Example:

11H0

0831

256

Example:

11H0E

831256

10-Lead DFN

XXXX

YYWW

NNN

— 1 = TC1303B

— 2 = TC1303A

— 3 = TC1303C

— 4 = TC1304

— 1 = 1.375V VOUT1

— H = 2.6V VOUT2

— 0 = Default

XXXXXX

YWWNNN

Code VOUT1 Code VOUT1 Code VOUT1

A3.3VJ2.4VS1.5V

B3.2VK2.3VT1.4V

C 3.1V L 2.2V U 1.3V

D 3.0V M 2.1V V 1.2V

E 2.9V N 2.0V W 1.1V

F 2.8V O 1.9V X 1.0V

G2.7VP1.8VY0.9V

H 2.6V Q 1.7V Z Adj

I 2.5V R 1.6V 1 1.375V

Code VOUT2 Code VOUT1 Code VOUT2

A3.3VJ2.4VS1.5V

B3.2VK2.3VT —

C 3.1V L 2.2V U —

D 3.0V M 2.1V V —

E 2.9V N 2.0V W —

F 2.8V O 1.9V X —

G2.7VP1.8VY —

H 2.6V Q 1.7V Z —

I 2.5V R 1.6V

Code Code

0 Default 2 +50 mV to V2

1 +50 mV to V1 3 +50 mV to V1

and V2

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Pb-free JEDEC designator for Matte Tin (Sn)

*This package is Pb-free. The Pb-free JEDEC designator ( )

can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

TC1303A/TC1303B/TC1303C/TC1304

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NOTE 1

EXPOSED

PAD

BOTTOM VIEW

TOP VIEW

A3 A1

NOTE 2

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TC1303A/1303B/1303C/1304

APPENDIX A: REVISION HISTORY

Revision C (December 2008)

The following is the list of modifications:

1. Updated Package Types diagram and

Section 3.0 “Pin Descriptions” to show the

Exposed Thermal Pad (EP) information.

2. Updated Section 6.0 “Packaging Informa-

tion”.

Revision B (July 2005)

The following is the list of modifications:

1. Added information on TC1303A, TC1303C and

TC1304 throughout data sheet.

Revision A (June 2005)

• Original Release of this Document.

TC1303A/1303B/1303C/1304

NOTES:

TC1303A/TC1303B/TC1303C/TC1304

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Device: TC1303A: PWM/LDO combo with Power-Good

TC1303B: PWM/LDO combo with Power-Good

TC1303C: PWM/LDO combo with Power-Good

TC1304: PWM/LDO combo with Power-Good

Options Code VOUT1 Code VOUT2 Code +50 mV

3.3V

3.2V

3.1V

3.0V

2.9V

2.8V

2.7V

2.6V

2.5V

2.4V

2.3V

2.2V

2.1V

2.0V

1.9V

1.8V

1.7V

1.6V

1.5V

1.4V

1.3V

1.2V

1.1V

1.0V

0.9V

Adjustable

1.375V

3.3V

3.2V

3.1V

3.0V

2.9V

2.8V

2.7V

2.6V

2.5V

2.4V

2.3V

2.2V

2.1V

2.0V

1.9V

1.8V

1.7V

1.6V

1.5V

Default

+50 mV to V1

+50 mV to V2

+50 mV to V1

and V2

* Contact Factory for Alternate Output Voltage and Reset Voltage

Configurations.

Temperature

Range:

E = -40°C to +85°C

Package: MF = Dual Flat, No Lead (3x3 mm body), 10-lead

UN = Plastic Micro Small Outline (MSOP), 10-lead

Tube or

Tape and Reel:

Blank = Tube

TR = Tape and Reel

Examples:

a) TC1303A-SI0EMF: 1.5V, 2.5V, Default,

10LD DFN pkg.

b) TC1303A-ZA0EUN: Adj, 3.3V, Default,

10LD MSOP pkg.

c) TC1303A-PP3EMFTR: 1.8V, 1.8V, +50 mV,

10LD DFN pkg.

Tape and Reel

a) TC1303B-1H0EMF: 1.375V, 2.6V, Default,

10LD DFN pkg.

b) TC1303B-AG0EUN: 3.3V, 2.7V, Default,

10LD MSOP pkg.

c) TC1303B-AD0EMF: 3.3V, 3.0V, Default,

10LD DFN pkg.

d) TC1303B-IA0EUN: 2.5V, 3.3V, Default,

10LD MSOP pkg.

e) TC1303B-IA0EMF: 2.5V, 3.3V, Default,

10LD DFN pkg.

f) TC1303B-PF0EUN: 1.8V, 2.8V, Default,

10LD MSOP pkg.

g) TC1303B-PF0EMF: 1.8V, 2.8V, Default,

10LD DFN pkg.

h) TC1303B-PG0EUN: 1.8V, 2.7V, Default,

10LD MSOP pkg.

i) TC1303B-DG0EMFTR: 3.0V, 2.7V, Default,

10LD DFN pkg.

Tape and Reel

a) TC1303C-VP0EMF: 1.2V, 1.8V, Default,

10LD DFN pkg.

b) TC1303C-VP0EMFTR: 1.2V, 1.8V, Default,

10LD DFN pkg.

Tape and Reel.

a) TC1304-VI0EMF: 1.2V, 2.5V, Default,

10LD DFN pkg.

b) TC1304-VP0EMF: 1.2V, 1.8V, Default,

10LD DFN pkg.

c) TC1304-VI0EUN: 1.2V, 2.5V, Default,

10LD MSOP pkg.

d) TC1304-VI0EMFTR: 1.2V, 2.5V, Default,

10LD DFN pkg.

Tape and Reel.

e) TC1304-VP0EMFTR: 1.2V, 1.8V, Default

10LD DFN pkg.

Tape and Reel.

f) TC1304-VI0EUNTR: 1.2V, 2.5V, Default,

10LD MSOP pkg.

Tape and Reel.

PART NO. X- X

VOUT1

Type

TC1303

VOUT2

+50 mV

Increments

Temp

Range

Package

Tube

Tape &

Reel

TC1303A/TC1303B/TC1303C/TC1304

NOTES:

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,

PICSTART, rfPIC, SmartShunt and UNI/O are registered

trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

FilterLab, Linear Active Thermistor, MXDEV, MXLAB,

SEEVAL, SmartSensor and The Embedded Control Solutions

Company are registered trademarks of Microchip Technology

Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, CodeGuard,

dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,

ECONOMONITOR, FanSense, In-Circuit Serial

Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB

Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,

PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,

PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total

Endurance, WiperLock and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:200 2 certif ication for its worldwide

headquarters, design and wafer fabrication facilit ies in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in Californi a

and India. The Company’s quality system processes and procedures

are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping

devices, Serial EEPROMs, microperi pherals, nonvola tile memo ry and

analog product s. In addition, Microchip ’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

AMERICAS

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01/02/08