SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
•Characterized for Use to 300 mA
•No Output Latch-Up at 55 V (After
Conducting 300 mA)
•High-Voltage Outputs (100 V Typ)
•Output Clamp Diodes for Transient
Suppression (300 mA, 70 V)
•TTL- or MOS-Compatible Diode-Clamped
Inputs
•pnp Transistor Inputs Reduce Input Current
•Standard Supply Voltage
•Suitable for Hammer-Driver Applications
•Plastic DIP (P) With Copper-Lead Frame
Provides Cooler Operation and Improved
Reliability
description
The SN75476 through SN75478 are dual
peripheral drivers designed for use in systems that
require high current, high voltage, and fast
switching times. The SN75476, SN75477, and
SN75478 provide AND, NAND, and OR drivers
respectively. These devices have diode-clamped
inputs as well as high-current, high-voltage clamp
diodes on the outputs for inductive transient
protection.
The SN75476, SN75477, and SN75478 drivers
are characterized for operation from 0°C to 70°C.
schematics of inputs and outputs
VCC
Input
CLAMP
Output
GND
EQUIVALENT
OF EACH INPUT TYPICAL
OF ALL OUTPUTS
1
2
3
4
8
7
6
5
S
1A
1Y
GND
VCC
2A
2Y
CLAMP
D OR P PACKAGE
(TOP VIEW)
H = high level, L = low level
X = irrelevant
INPUTS OUTPUT
Y
SN75476
(each AND driver)
AS
H
L
X
H
X
L
H
L
L
Function Tables
INPUTS OUTPUT
Y
SN75477
(each NAND driver)
AS
H
L
X
H
X
L
L
H
H
INPUTS OUTPUT
Y
SN75478
(each OR driver)
AS
H
X
L
X
H
L
H
H
L
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
logic symbols†logic diagrams (positive logic)
†These symbols are in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
2A
S
1A
7
1
2
GND
CLAMP
2Y
1Y
4
5
6
3
CLAMP
CLAMP
2Y
1Y
7
1
2
2A
S
1A
5
6
3
3
6
5
1A
S
2A
2
1
7
1Y
2Y
CLAMP
CLAMP
3
6
5
4
1Y
2Y
CLAMP
GND
2
1
7
1A
S
2A
2A
S
1A
7
1
2
GND
CLAMP
2Y
1Y
4
5
6
3
CLAMP
CLAMP
2Y
1Y
7
1
2
2A
S
1A
5
6
3
&
&
≥1
SN75476 SN75476
Positive Logic: Y = AS or A+S
SN75477 SN75477
Positive Logic: Y = AS or A+S
SN75478 SN75478
Positive Logic: Y = A+S or A S
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current (see Note 2) 400 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current: tw ≤ 10 ms, duty cycle ≤ 50% 500 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
tw ≤ 30 ns, duty cycle ≤ 0.002% 3 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK 400 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOTES: 1. V oltage values are with respect to network GND.
2. Both halves of this dual circuit may conduct rated current simultaneously; however, power dissipation averaged over a short time
interval must fall within the continuous power dissipation ratings.
DISSIPATION RATING TABLE
PACKAGE
T
A
≤ 25°CDERATING FACTOR T
A
= 70°C
PACKAGE
A
POWER RATING ABOVE TA = 25°C
A
POWER RATING
D725 mW 5.8 mW/°C464 mW
P1000 mW 8.0 mW/°C640 mW
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, VCC 4.5 5 5.5 V
High-level input voltage, VIH 2 V
Low-level input voltage, VIL 0.8 V
Operating free-air temperature, TA0 70 °C
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
electrical characteristics over recommended operating free-air temperature range
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIK Input clamp voltage II = –12 mA –0.95 –1.5 V
VCC
=
4.5 V,
IOL = 100 mA 0.16 0.3
VOL Low-level output voltage
VCC
=
4
.
5
V
,
VIH = 2 V, IOL = 175 mA 0.22 0.5 V
VIL = 0.8 V IOL = 300 mA 0.33 0.6
VO(BR) Output breakdown voltage VCC = 4.5 V, IOH = 100 µA 70 100 V
VR(K) Output clamp reverse voltage VCC = 4.5 V, IR = 100 µA 70 100 V
VF(K) Output clamp forward voltage VCC = 4.5 V, IF = 300 mA 0.8 1.15 1.6 V
IOH
High level out
p
ut current
V
CC
= 4.5 V, V
IH
= 2 V,
1
100
µA
I
OH
High
-
le
v
el
o
u
tp
u
t
c
u
rrent
CC ,
VIL = 0.8 V,
IH ,
VOH = 70 V
1
100
µ
A
IIH High-level input current VCC = 5.5 V, VI = 5.5 V 0.01 10 µA
IIL
Low level in
p
ut current
A input
VCC =55V
VI=08V
–80 –110
µA
I
IL
Lo
w-
le
v
el
inp
u
t
c
u
rrent
S input
V
CC =
5
.
5
V
,
V
I =
0
.
8
V
–160 –220 µ
A
SN75476 VI = 5 V 10 17
ICCH Supply current, outputs high SN75477 VCC = 5.5 V VI = 0 10 17 mA
SN75478 VI = 5 V 10 17
SN75476 VI = 0 54 75
ICCL Supply current, outputs low SN75477 VCC = 5.5 V VI = 5 V 54 75 mA
SN75478 VI = 0 54 75
†All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 200 350 ns
tPHL Propagation delay time, high-to-low-level output C
L
= 15 pF, R
L
= 100 Ω,200 350 ns
tTLH T ransition time, low-to-high-level output
L,
See Figure 1
L,
50 125 ns
tTHL T ransition time, high-to-low-level output 90 125 ns
VOH
p
V
S
= 55 V, I
O
≈ 300 mA,
VS18
mV
V
OH
-
v
u
u
v
w
S,
See Figure 2
O,
V
S–
18
mV
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
30 V
2.4 V
0.4 V
TEST CIRCUIT
A/S
S/A
SN75478
SN75476
SN75477 RL = 100 Ω
CL = 15 pF
(see Note B)
VCC
2.7 V 2.7 V
1.5 V 1.5 V
0.7 V 0.7 V
50%50%
tPHL
≤ 10 ns≤ 5 ns 3 V
0 V
VOH
VOL
Output
VOLTAGE WAVEFORMS
0.7 V
2.7 V
Input
tPLH
10% 10%
90% 90%
tTHL tTLH
3 V
0 V
≤10 ns
≤ 5 ns
0.7 V
1.5 V 2.7 V
1.5 V
5 µs
SN75446
SN75448
SN75447
Pulse
Generator
(see Note A)
Input
Circuit
Under
Test
Output
Open
Input
NOTES: A. The pulse generator has the following characteristics: PRR = 100 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 1. Test Circuit and Voltage Waveforms, Switching Characteristics
SN75476 THRU SN75478
DUAL PERIPHERAL DRIVERS
SLRS025A – DECEMBER 1976 – REVISED NOVEMBER 1995
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
2 mH
Input 2.4 V
Output
0.4 V
TEST CIRCUIT
S
SN75478
SN75476
SN75477
VS = 55 V
CL = 15 pF
(see Note B)
5 V
90% 90%
1.5 V 1.5 V
10% 10%
≤ 10 ns≤ 5 ns 3 V
0 V
VOH
VOL
Output
VOLTAGE WAVEFORMS
10%
90%
Input
3 V
0 V
≤10 ns
≤ 5 ns
10%
1.5 V 90%
1.5 V
40 µs
SN75476
SN75478
SN75477
A
GND
Pulse
Generator
(see Note A) Circuit
Under
Test
180 Ω
Input
NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 2. Latch-Up Test Circuit and Voltage Waveforms
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Copyright 1998, Texas Instruments Incorporated