BSZ018NE2LSI OptiMOSTM Power-MOSFET Product Summary Features * Optimized for high performance Buck converter * Monolithic integrated Schottky like diode * Very low on-resistance R DS(on) @ V GS=4.5 V * 100% avalanche tested VDS 25 V RDS(on),max 1.8 mW ID 40 A QOSS 23 nC QG(0V..10V) 36 nC * N-channel PG-TSDSON-8 (fused leads) 1) * Qualified according to JEDEC for target applications * Pb-free lead plating; RoHS compliant * Halogen-free according to IEC61249-2-21 Type Package Marking BSZ018NE2LSI PG-TSDSON-8 (fused leads) 018NE2I Maximum ratings, at T j=25 C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value V GS=10 V, T C=25 C 40 V GS=10 V, T C=100 C 40 V GS=4.5 V, T C=25 C 40 V GS=4.5 V, T C=100 C 40 V GS=4.5 V, T A=25 C, R thJA=60 K/W 2) 22 Unit A Pulsed drain current3) I D,pulse T C=25 C 160 Avalanche current, single pulse4) I AS T C=25 C 20 Avalanche energy, single pulse E AS I D=20 A, R GS=25 W 80 mJ Gate source voltage V GS 20 V 1) J-STD20 and JESD22 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. 3) See figure 3 for more detailed information Rev. 2.1 page 1 2013-04-25 BSZ018NE2LSI Maximum ratings, at T j=25 C, unless otherwise specified Parameter Symbol Conditions Power dissipation P tot Value T C=25 C 69 T A=25 C, T j, T stg -55 ... 150 IEC climatic category; DIN IEC 68-1 Parameter W 2.1 R thJA=60 K/W 2) Operating and storage temperature Unit C 55/150/56 Values Symbol Conditions Unit min. typ. max. - - 1.8 - - 60 25 - - V - 15 - mV/K Thermal characteristics Thermal resistance, junction - case R thJC Device on PCB R thJA 6 cm2 cooling area2) K/W Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=10 mA Breakdown voltage temperature coefficient dV (BR)DSS I D=10 mA, referenced /dT j to 25 C Gate threshold voltage V GS(th) V DS=V GS, I D=250 A 1.2 - 2.0 V Zero gate voltage drain current I DSS V DS=20 V, V GS=0 V, T j=25 C - - 0.5 mA V DS=20 V, V GS=0 V, T j=125 C - 2 - Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=20 A - 2.0 2.5 mW V GS=10 V, I D=20 A - 1.5 1.8 0.4 0.8 1.6 W 50 100 - S Gate resistance RG Transconductance g fs Rev. 2.1 |V DS|>2|I D|R DS(on)max, I D=20 A page 2 2013-04-25 BSZ018NE2LSI Parameter Values Symbol Conditions Unit min. typ. max. - 2500 3325 - 1100 1463 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 110 - Turn-on delay time t d(on) - 5.2 - Rise time tr - 4.8 - Turn-off delay time t d(off) - 25 - Fall time tf - 3.6 - Gate to source charge Q gs - 6.3 8.4 Gate charge at threshold Q g(th) - 4.1 - Gate to drain charge Q gd - 4.3 6.5 Switching charge Q sw - 6.6 - Gate charge total Qg - 17 23 Gate plateau voltage V plateau Gate charge total Qg V DD=12 V, I D=30 A, V GS=0 to 10 V - 36 48 Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 4.5 V - 15 - Output charge Q oss V DD=12 V, V GS=0 V - 23 31 - - 40 - - 160 V GS=0 V, V DS=12 V, f =1 MHz V DD=12 V, V GS=10 V, I D=30 A, R G,ext=1.6 W pF ns Gate Charge Characteristics5) V DD=12 V, I D=30 A, V GS=0 to 4.5 V 2.5 nC V nC Reverse Diode Diode continuous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=7 A, T j=25 C - 0.55 0.7 Reverse recovery charge Q rr V R=15 V, I F=7 A, di F/dt =400 A/s - 5 - 4) 5) A T C=25 C V nC See figure 13 for more detailed information See figure 16 for gate charge parameter definition Rev. 2.1 page 3 2013-04-25 BSZ018NE2LSI 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS10 V 50 80 70 40 60 30 ID [A] Ptot [W] 50 40 20 30 20 10 10 0 0 0 40 80 120 0 160 40 80 TC [C] 120 160 TC [C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 101 limited by on-state resistance 1 s 10 s 102 100 0.5 100 s 0.2 ZthJC [K/W] 1 ms ID [A] 10 ms 101 DC 0.1 0.05 10-1 0.02 0.01 single pulse 100 10-2 10-1 10-3 10-1 100 101 102 VDS [V] Rev. 2.1 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2013-04-25 BSZ018NE2LSI 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 C R DS(on)=f(I D); T j=25 C parameter: V GS parameter: V GS 300 3 10 V 4.5 V 5V 4V 3.5 V 3.5 V 2.5 4V 4.5 V 2 RDS(on) [mW] 200 ID [A] 3.2 V 5V 7V 8V 1.5 10 V 3V 100 1 2.8 V 0.5 0 0 0 1 2 3 0 10 20 VDS [V] 30 40 50 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 C parameter: T j 300 400 250 320 200 gfs [S] ID [A] 240 150 160 100 80 50 150 C 25 C 0 0 0 1 2 3 4 5 VGS [V] Rev. 2.1 0 40 80 120 160 ID [A] page 5 2013-04-25 BSZ018NE2LSI 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=20 A; V GS=10 V V GS(th)=f(T j); V GS=V DS; I D=10 mA 3 2.5 2.5 2 10 mA 1.5 VGS(th) [V] RDS(on) [mW] 2 typ 1.5 1 1 0.5 0.5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 Tj [C] 60 100 140 180 Tj [C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 103 10000 Ciss 102 Coss 103 150 C -55 C 1000 25 C IF [A] C [pF] 125 C 101 Crss 102 100 100 101 10-1 10 0 5 10 15 20 25 VDS [V] Rev. 2.1 0 0.4 0.8 1.2 VSD [V] page 6 2013-04-25 BSZ018NE2LSI 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 W V GS=f(Q gate); I D=30 A pulsed parameter: T j(start) parameter: V DD 100 12 12 V 10 5V 20 V 8 VGS [V] IAV [A] 25 C 100 C 10 125 C 6 4 2 1 0 1 10 100 1000 0 10 tAV [s] 20 30 40 Qgate [nC] 15 Typ. drain-source leakage current 16 Gate charge waveforms I DSS=f(V DS ); V GS=0 V parameter: T j 10-2 V GS Qg 10-3 125 C IDSS [A] 100 C 10-4 75 C V gs(th) 10-5 25 C Q g(th) Q sw Q gs 10-6 0 5 10 15 Q gate Q gd 20 Vsd [V] Rev. 2.1 page 7 2013-04-25 BSZ018NE2LSI Package Outline Rev. 2.1 PG-TSDSON-8 (fused leads) page 8 2013-04-25 BSZ018NE2LSI Published by Infineon Technologies AG 81726 Munich, Germany (c) 2011 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.1 page 9 2013-04-25