AA) MOTOROLA MMH0026 MMH0026C Specifications and Applications Information DUAL MOS CLOCK DRIVER ... designed for high-speed driving of highly capacitive loads in a MOS system. Fast Transition Times 20 ns with 1000 pF Load High Output Swing 20 Volts High Output Current Drive + 1.5 Amperes High Repetition Rate 5.0 to 10 MHz Depending on Load MTTL and MOTL Compatible Inputs Low Power Consumption when in MOS 0 State 2.0 mW +5.0-Volt Operation for N-Channel MOS Compatibility DUAL MOS CLOCK DRIVER SILICON MONOLITHIC INTEGRATED CIRCUIT FIGURE 1 CIRCUIT SCHEMATIC (1/2 CIRCUIT SHOWN) Vee ot R7g nse 3 BRe INPUT RA F DI as a pe Oe nos Le aa e he Do 10 R12 2 $ b2 OUTPUT d ai ent O bg R3 Pe as }~ o4 ps 07 Lal. G SUFFIX METAL PACK AGE CASE 601-02 T0-99 (Top View) L SUFFIX CERAMIC PACKAGE CASE 632-02 TO-116 (Top View) +- 4 a6 a DS es : oy we ag z > R10 ZR 2ns " : VEE TYPICAL OPERATION (Rg = 10 8%, CL = Cin = 1000 pF. f = 1.0 MHz, PW = 600 ns, Voc = 0 V, Veg * -20 V) 5.0 VOLTS/DIV. -20V 100 ns/IDIV Pl SUFFIX U SUFFIX PLASTIC PACKAGE CERAMIC PACKAGE CASE 626 CASE 693 {MMHOOZEC Only) wc INPUT A 3 vee | INPUT B tt FJ OUTPUT B {Top View) 4-52MMH0026, MMH0026C MAXIMUM RATINGS (Ta, = +25C unless otherwise noted.) Differential Supply Voltage Input Current emperature G ULL Pl MMHO0026 _ MMHO0026C Oto +70 O10 +70 O10 +70 emperature Range Tstq to +150 to +150 to +150 ELECTRICAL CHARACTERISTICS (Vcc-VeE = 10 V to 20 V, Cy. = 1000 pF, Ta = - 55 to +125C for MMHO0026 and 0 to +70C for MMHOO26C for min and max values; Ta = +25C for all typical values unless otherwise noted.) Characteristic Symbot Min Typ Max Unit Logic 1" Level input Voltage ViH Veet2.0 |VeEt+t.s ~ Vde Vo = Vee + 1.0 Vde Logic 1 Level Input Current lH - 10 15 mA V1 VeEg = 2.4 Vdc, Vo = Veg + 1.0 Vide Logic 0 Level input Voltage Vit = VeetO6 | VEE +04 Vde Vo= Vcc -1.0 Vde Logic '0 Level Input Current tie - ~0.005 -10 uA Vy VeeE = 0 Vde, Vg = Voc -1.0 Vde Logic 0 Level Output Voltage VoH Vde Vec = +5.0 Vde, Veg = -12 Vde, Vy = -11.6 Vde 4.0 43 - Vy -Vee = 0.4 Vde Vec -1.0 Voc -0.7 - Logic ''1 Level Output Voltage VoL Vde Voc = +5.0 Vde, Veg = -12 Vde, Vi = -9.6 Vade - ~11.5 ~11 Vi Vee = 2.4 Vde ~ Vee+O5 |Vee+ 1.0 On Supply Current [Tevet ~ 30 40 mA Vec Vege = 20 Vde, Vi) Veg = 2.4 Vde Off Supply Current MMHO0026C SocH = 10 100 pA VecVee = 20 Vde, Vj -Veg=0V MMHO0026 7 = 500 SWITCHING CHARACTERISTICS (Vec-Veg = 10 V to 20 V, Cy = 1000 pF, Ta = 25C) Propagation Time High to Low {Figure 2) PHL 5.0 75 12 ns (Figure 3) - ce) - Low to High (Figure 2) tPLH 5.0 12 15 (Figure 3) _ 13 _ Transition Time (High to Low) tTHL ns Voc-VEE = 20 Vde, Cy = 250 pF {Figure 2) _ 12 _ Voc-VEEg = 20 Vde, Cy = 500 pF (Figure 2} _ 18 18 (Figure 3} - 30 40 Vec-VEE = 20 Vdc, Cy = 1000 pF {Figure 2) ~ 20 35 (Figure 3) - 36 50 Transition Time (Low to High} ITLH ns Voc-VEE = 20 Vde, Ci, = 250 pF {Figure 2) - 10 _ Vcc-VEE * 20 Vdc, Cy = 500 pF (Figure 2) - 12 16 {Figure 3) = 28 35 Vec -VEE = 20 Voc, Cy = 1000 pF {Figure 2) - 7 25 (Figure 3) ~ 31 40 4-53MMH0026, MMH0026C TEST CIRCUIT FIGURE 2 AC TEST CIRCUIT AND WAVEFORMS +20 V +5 Vde O.1HF] 5.04uF Mi z= tL w = I 50 A A 100 pF 1000 pF o- _it et WW + Vo MMH0026,C k Vie aw 2N2369A 8 CL 1 Or Equiv 4 V, = 5.0 Vde > PRE = 1QMHz = PW = 0.5 us TTLH * tTHL &10 ns 10% FIGURE 3 AC TEST CIRCUIT AND WAVEFORMS +20V Pulse Generator Input L CL v,=3.0V 4 PRE = 1.0 MHz 7h 1000 pF 5O PW = 0.5 us TTL = tTHE < 19S Circuit diagrams utilizing Motorola products are included as a means of illustrating typrcal semiconductor applications. consequently. complete information sufficient for construction purposes 1s not necessarily qwen. The intormation has been carefully checked and assumed for inaccuracies. Is beheved to be entirely reliable Furthermore, such intarmation does not convey to the purchaser of the semiconductor devices described any tense under the patent rights of Motorola Inc. or others. However, no responsibility 1s 4-54MMH0026, MMHO0026C PW, GUTPUT PULSE WIDTH (ns ij, INPUT CURRENT {mA) tp, PROPAGATION DELAY TIME (ns) FIGURE 4 INPUT CURRENT versus INPUT VOLTAGE 0 @ "278 Os 1.0 1s Vin. INPUT VOLTAGE (V} TYPICAL CHARACTERISTICS (Vec = + 20 V, Veg = 0 V, Ta = +25C unless otherwise noted.) 2.0 FIGURE 6 ~ OPTIMUM INPUT CAPACITANCE versus OUTPUT PULSE WIDTH 200 400 600 300 Cin, OPTIMUM INPUT CAPACITANCE (pF) 1000 1200 FIGURE & PROPAGATION DELAY TIMES versus TEMPERATURE -50 Voc-Vee = 20V Cin= -25 CL = 1000 pF Ro = 502 6 +28 +60 T, TEMPERATURE (C) +75 +100 25 1400 +125 FIGURE 5 SUPPLY CURRENT versus TEMPERATURE 9.0 DUTY CYCLE = 20% f= 1 MHz Cy =0 pF go = Vcec-VEE = +20V VcCC-VEE +17 V icc, SUPPLY CURRENT (mA) o a a 5.0 3H +50 ~28 a +25 +50 +76 +1000 +125 T, TEMPERATURE (C) FIGURE 7 ~ TRANSITION TIMES versus LOAD CAPACITANCE 28 Vec-VeE =20V Ro =502 = 2 wa = = z oa e a z = 10 ~ r 0 0 200 400 600 800 1000 C._, LOAD CAPACITANCE (pF) FIGURE 9 - TRANSITION TIMES versus TEMPERATURE 26 Voc-VEE > 20V Cc = 1000 pF nN Nn tT, TRANSITION TIME (ns) = = ~75 -50 -2 Q +28 +50 +15 +1000 +125 T, TEMPERATURE (9C} 4-55MMH0026, MMHO026C ty, TRANSITION TIME (ns) 1, TIME (ns) Pg, DC POWER DISSIPATION (mW) TYPICAL CHARACTISTICS (continued) (Voc = + 20 V, Veg = 0 V, Ta = +25C unless otherwise noted.) FIGURE 10 TRANSITION TEME versus TEMPERATURE FOR +5 VOLT DC-COUPLED CIPERATION (See Figure 4.) 25 Voc = +45 V.f = | MHz, PW = 200 ns CL = 5:0 pF, Cin = 510 pF, Rin = 1k 23 VEE=OV 21 19 Ww 16 13 -65 ~25 0 +25 +60 +75 +100 +125 T, TEMPERATURE (C) FIGURE 12 DC-COUPLED SWITCHING RESPONSE versus Rip (See Figure 4.) 38 Cy = 1000 pF Cin = 510 pF VEEsOV Veo#17V 30 20 0 20 40 60 8.0 10 Rin, RESISTANCE (k 82) FIGURE 14 MAXIMUM DC POWER DISSIPATION versus DUTY CYCLE (SINGLE DRIVER) 700 TIME OUTPUT IS LOW UTY CYCLE = --_______-- 600 o evcle TOTAL TIME X 100% 590 400 300 200 Voec-Vee = 16 V VeC-VEE = 12V 160 0 10 20 30 40 50 6a 70 OUTY CYCLE (%: FIGURE 11 PROPAGATION DELAY TIME versus TEMPERATURE FOR +5 VOLT DC-COUPLED OPERATION (See Figure 4.) 22 20 CL=510pF, Cin - 510 pF, Rin = 1kQ tp, PROPAGATION DELAY TIME {ns} a -55 -25 0 +25 +50 +75 +160 +125 T, TEMPERATURE (C) FIGURE 13 DC-COUPLED SWITCHING versus Ci, (See Figure 4.) = w = = 0 0 100 = 200 300s 400500 600 700 = 800 Cin, CAPACITANCE (pF} FIGURE 15 AC POWER DISSIPATION versus FREQUENCY (SINGLE DRIVER} 1000 700 Veer IGV = s00 S CLs = 200 = a Cy = 500 pF = 100 a 70 = 2 = 40 <= = XY 3 Ss Ss 02 0.4 07) 10 20 4d 70 10 f, FREQUENCY (MHz) 4-56MMH0026, MMHO026C APPLICATIONS INFORMATION OPERATION OF THE MMH0026 The simplified schematic diagram of MMH0026, shown in Figure 16, is useful in explaining the operation of the device. Figure 16 illustrates that as the input voltage level goes high, diode D1 provides an 0.7-volt dead zone thus ensuring that Q2 is turned on and Q4 is turned oft" before Q7 is turned on, This prevents undesirable current spiking from the power supply, which would occur if Q7? and Q4 were allowed to be on simul- taneously for an instant of time. Diode D2 prevents zenering of Q4 and provides an initial discharge path for the output capacitive load by way of Q2. As the input voltage level goes tow, the stored charge in Q2 is used advantageously to keep Q2 on and 04 off until Q7 is off. Again undesirable current spiking is prevented. Due to the external capacitor, the input side of Cj goes negative with respect to VEE causing QY9 to conduct momentarily thus assuring rapid turn off of Q7. FIGURE 16 SIMPLIFIED SCHEMATIC DIAGRAM (Ref.: Figure 1) Voc J 2 R6< R3 4-57 The complete circuit, Figure 1, basically creates Dar- lington devices of transistors Q7, Q4 and Q2 in the simplified circuit of Figure 16. Note in Figure 1 that when the input goes negative with respect to VEE, ciodes D7 through D10 turn on assuring faster turn off of transistors Q1, Q2, Q6 and Q7. Resistor R6 insures that the output will charge to within one Vge voltage drop of the Vcc supply. SYSTEM CONSIDERATIONS Overshoot: In most system applications the output waveform of the MMH0026 will overshoot to some degree. However, overshoot can be eliminated or reduced by placing a damping resistor in series with the output. The amount of resistance required is given by: Rs = 2 L/Cy where L is the inductance of the fine and C__ is the load capac- itance. In most cases a series of damping resistor in the range of 10-to-50 ohms will be sufficient. The damping resistor also affects the transition times of the outputs. The speed reduction is given by the formula: tTHL * tTLH = 2.2 Rs CL (Rg is the damping resistor). Crosstalk: The MMHO026 is sensitive to crosstalk when the output voltage level is high (Vo ~ Vcc). With the output in the high voltage level state, Q3 and Q4 are essentially turned off. Therefore, negative-going crosstalk will pull the output down until 04 turns on sufficiently to pull the output back towards Vcc. This problem can be min- imized by placing a bleeding resistor from the output to ground. The bleeding resistor should be of suf- ficient size so that Q4 conducts only a few milliamperes. Thus, when noise is coupied, Q4 is already on and the line is quickly clamped by Q4. Also note that in Figure 1 D6 clamps the output one diode-voltage drop above Vcc for positive-going crosstalk. Power Supply Decoupling: The decoupling of Vcc and Vee is essential in most systems. Sufficient capacitive decoupling is required to supply the peak surge currents during switching. At least a 0.1-4F to 1.0uF low inductive capacitor should be placed as close to each driver package as the layout will permit. Input Driving: For those applications requiring split power supplies (VEE < GND), ac coupling, as illustrated in Figure 23, should be employed. Selection of the input capacitor size is determined by the desired output pulse width. Maximum performance is attained when the voitage atMMH0026, MMHO0026C APPLICATIONS INFORMATION (continued) the input of the MMHO0026 discharges to just above the device's threshold voltage (about 1.5 V). Figure 6 shows optimum values for Cjn versus the desired output pulse width. The value for Cj, may be roughly predicted by: Cin = (2 x 1073) (PWo). (1) For an output pulse width of 500 ns, the optimum value for Cin is: Cin = (2 x 1075) (500 x 1091 = 1000 pF. If single supply operation is required (Veg = GND}, then de coupling as illustrated in Figure24can be employed. For maximum switching performance, a speed-up capac- itor should be employed with de coupling. Figures 12 and 13 show typical switching characteristics for various values of input resistance and capacitance. POWER CONSIDERATIONS Circuit performance and long-term circuit retiability are affected by die temperature.JNormally, both are improved by keeping the integrated circuit junction temperatures low. Electrical power dissipated in the integrated circuit is the source of heat. This heat source increases the temperature of the die relative to some reference point, normally the ambient temperature. The temperature in- crease depends on the amount of power dissipated in the circuit and on the net thermal resistance between the heat source and the reference point. The basic formula for converting power dissipation into junction temper- ature is: Ty=Ta + Pp (Rasc+Reca) (2) or Ty= TA +Pp (Rasa! (3} where Ty = junction temperature Ta = ambient temperature Pp = power dissipation Rg Jc = thermal resistance, junction to case Rca= thermal resistance, case to ambient RaJA = thermal resistance, junction to ambient. Power Dissipation for the MMHOG026 MOS Clack Driver: The power dissipation of the device (Pp) is dependent on the following system requirements: frequency of op- eration, capacitive loading, output valtage swing, and duty cycte. This power dissipation, when substituted into equation (3), should not yield a junction temperature, Ty, greater than Ty{max) at the maximum encountered ambient temperature. Ty(max} is specified for three integrated circuit packages in the maximum ratings section of this data sheet. 4-58 TABLE 1 THERMAL CHARACTERISTICS OF G", tL, P1", AND U PACKAGES Resa (C) Re sc (CM) PACKAGE TYPE Stitt Air Still Air (Mounted in Socket} MAX TYP MAX Tye G" (Metal Package) 220 175 70 40 u"' (Ceramic Package)| 150 100 50 27 P1" (Plastic Package) 150 100 70 40 ue (Ceramic Package) 150 100 50 27 FIGURE 17 MAXIMUM POWER DISSIPATION versus AMBIENT TEMPERATURE (As related to package! 14 = 12 a 2 Land U PACKAG PACKAGES SOCKET 5. ~ MOUNTED IN z Pi PACKAGE STILL AIR = 08 z G" PACKAGE 8 2 06 a & = 04 ao & 2s nm 715 -500-25 0 +25 +60 +75 +100 Ta, AMBIENT TEMPERATURE (C) +125 +180 With these maximum junction temperature values, the maximum permissible power dissipation at a given ambient temperature may be determined. This can be done with equations (2) or (3) and the maximum thermal resistance values given in Table 1 or alternately, by using the curves plotted in Figure 17. If, however, the power dissipation determined by a given system produces a calculated junction temperature in excess of the recom: mended maximum rating for a given package type, some- thing must be done to reduce the junction temperature. There are two methods of lowering the junction tem- perature without changing the system requirements. First, the ambient temperature may be reduced suf- ficiently to bring Ty to an acceptable value. Secondly, the Raca termcan be reduced. Lowering the R@ca term can be accomplished by increasing the surface area of the package with the addition of a heat sink or by blowing air across the package to promote improved heat dissipation. +175MMH0026, MMHO0026C APPLICATIONS INFORMATION (continued) The following examples illustrate the thermal consider- ations necessary to increase the power capability of the MMHO026. Assume that the ceramic package is to be used at a maximum ambient temperature (Ta) of +70C. From Table 1:R@JA(max)= 150C/watt, and from the max- imum rating section of the data sheet: T y(max) = +175C. Substituting the above values into equation (3) yields a maximum allowable power dissipation of 0:7 watts. Note that this same value may be read from Figure 17. Also note that this power dissipation value is for the device mounted in a socket. Next, the maximum power consumed for a given system application must be determined. The power dissipation of the MOS clock driver is conveniently divided into dc and ac components. The dc power dissipation is given by: Pac = (Vee VEE) x (IccL) x (Duty Cycle) (4) Vcc VEE where | = 40 mA (-}. CCL 20V Note that Figure 14 is a plot of equation (4) for three values of (VCCVEE). For this example, suppose that the MOS clock driver is to be operated with Vcc = +16 V and Vege = GND and with a 50% duty cycle. From equation (4) or Figure 14, the dc power dissipation (per driver) may be found to be 256 mW. If both drivers within the package are used in an identical way, the total dc power is 512 mW. Since the maximum total allowable power dissipation is 700 mW, the maximum ac power that can be dissipated for this example becomes: Pac = 0.7 ~ 0.512 = 188 mW The ac power for each driver is given by: Pac = (Vcc Vee)? x fx CL where f = frequency of operation CL = load capacitance (including all strays and wiring). (5) Figure 16 gives the maximum ac power dissipation versus switching frequency for various capacitive loads with Vcc = 16 V and Veg = GND. Under the above con- ditions, and with the aid of Figure 15, the safe operating area beneath Curve A of Figure 18 can be generated. Since both drivers have a maximum ac power dissi- pation of 188 mW, the maximum ac power per driver becomes 94 mW. A horizontal line intersecting all the capacitance load lines at the 94 mW ievel of Figure 15 will yield the maximum frequency of operation for each of the capacitive loads at the specified power level. By 4-59 using the previous formulas and constants, a new safe operating area can be generated for any output voltage swing and duty cycle desired. Note from Figure 18, that with highly capacitive loads, the maximum switching frequency is very low. The switching frequency can be increased by varying the following factors: (a) decrease Ta (b) decrease the duty cycle {c) tower package thermal resistance (Rg JA) {n most cases conditions (a) and (b) are fixed due to system requirements. This leaves only the thermal re- sistance Rg ja that can be varied. Note from equation (2) that the therrmai resistance is comprised of two parts. One is the junction-to-case thermal resistance (Rg@je) and the other is the case-to- ambient thermal resistance (R@ca). Since the factor Rg jc is a function of the die size and type of bonding employed, it cannot be varied. However, the Rgca term can be changed as previously discussed, see Page 7. FIGURE 18 LOAD CAPACITANCE versus FREQUENCY FOR L PACKAGE ONLY {Both drivers used in identical way) ~ 700 Ta = +70C A SOCKET MOUNT 8: PC BOARD MOUNT &@ eqato~CNO HEAT SINK NO HEAT SIN = DUTY CYCLE = 50% WO AIA FLOW NO AIR PW cx 600 F~ Veg = +16 V ~~ SOCKET MOUNT O SOCKET MOUNT > |_VeE=0V | __ THERMALLOY 6or78 NO HEAT SINK =z t HEAT SINK OR EQUIV soa LPM S500 Art Be Cee De EM NO AIR FLOW AIR FLOW U { NX &: SOCKET MOUNT TN THERMALLOY 60128 400 MEAT SINK OR EQUIV 2 KA AIR FLOW = 500 WRAN z \ KA, 3 AN ~_S S 200 2 beeen 3 ~s | pened = 100 Pe, o I~ SAFE OPERATING AREA 0 l i o 20 4.0 8.0 10 / 0 1, SWITCHING FREQUENCY (MHz) Heat Sink Considerations: Heat sinks come in a wide variety of sizes and shapes that will accomodate almost any IC package made. Same of these heat sinks are illustrated in Figure 19. In the previous example, with the ceramic package, no heat sink and in a still air environment, Rg JA(max)was 150C/W. For the following example the Thermalloy 60128 type heat sink, or equivalent, is chosen. With this heat sink, the Rca for natural convection from Figure 20 is 44C/W. From Table 1 Rgjc(max) = 50C/W for the ceramicMMH0026, MMH0026C APPLICATIONS INFORMATION (continued) FIGURE 19 THERMALLOY* HEAT SINKS *Manufactured by Thermalloy Co. of Texas package. Therefore, the new Ra ja(max) with the 6012B heat sink added becomes: Ra sAimax) = 50C/W + 44C/W = 94C /W. Thus the addition of the heat sink has reduced Rg ya(max) from 150C/W down to 94C/W. With the heat sink, the maxirnum power dissipation by equation (3) at Ta = +70C is: 175C 70C = 1.11 watts. This gives approximately a 58% increase in maximum power dissipation. The safe operating area under Curve C of Figure 18 can now be generated as before with the aid of Figure 19 and equation (5). FIGURE 20 CASE TEMPERATURE RISE ABOVE AMBIENT versus POWER DISSIPATED USING NATURAL CONVECTION 2 3S oo o THEAMALLOY #60128 DIP HEAT SINK OR EQUIV THERMALLOY =6007 OIP HEAT SINK OR EQuiv D o > a CASE TEMPERATURE RISE ABOVE AMBIENT TEMPERATURE (C) ERMALLOY TQ-99 HEAT SINK OR 0 np 05 ; 15 Pp. POWER DISSIPATED (WATTS) 2.0 4-60 Forced Air Considerations: As illustrated in Figure 21, forced air can be employed to reduce the Raya term. Note, however, that this curve is expressed in terms of typical Rg ya rather than maximum Raja. Maximum Rg ja, can be determined in the follow- ing manner: From Table 1 the following information is known: (a) ResAltyp) = 100 C/W (b) Reycityp) = 27 C/W Since: Roja = Rac + Reca (6) Then: Reca = Rasa - Ric (7) Therefore, in still air RgcAltyp) = 100C/W 27CAW = 73C/W From Curve 1 of Figure 21 at 500 LFPM and eq- uation (7), RECA(typ) = S3C/W 27C /W = 26C WwW. Thus Rgcaltyp) has changed from 73C/W (still air) to 26C/W (500 LFPM), which is a decrease in typical Raca by a ratio of 1:2.8. Since the typical value of Rgaca was reduced by a ratio of 1:2.8, R@cA(max) of 100C/W should also decrease by a ratio of 1:2.8. This yields an R9CA(max] at 500 LFPM of 36C/W. Therefore, from equation (6): ROJA(max} = 50C/W + 36C/W = 86C /W. Therefore the maximum allowable power dissipation at 500 LFPM and Ta = +70C is from equation (3): 175C 70C Pp = = 1,2 watts. Dp +B6C/WMMH0026, MMHO0026C APPLICATIONS INFORMATION (continued) FIGURE 21 TYPICAL THERMAL RESISTANCE (Reja) OF LL PACKAGE versus AIR VELOCITY 100 xT Cc T T a AIR FLOW DIRECTION Ri: I PACKAGE MOUNTING =1 BARNES SOCKET OR EQuiv_] N\ =2 PRINTED CIRCUIT BOARD 4" x 6 x 0,002" 202. Cu. NX aS 2 a o So at a ie } By JA. THERMAL RESISTANCE JUNCTION TO AMBIENT (CAVATT) a 3 <= | 40 a Ry Jat JOOeC WATT 30 give 27cwart {NO AIR FLOW | \ | 200 400 600 800 1000 1200 1400 1600 AIR VELOCITY (LINEAR FEET PER MINUTE) NR 3S As with the previous examples, the dc power at 50% duty cycle is subtracted from the maximum allowable device dissipation (Pp) to obtain a maximum Pa>. The safe operating area under Curve D of Figure 18 can now be generated from Figure 15 and equation (5). Heat Sink and Forced Air Combined: Some heat sink manufacturers provide data and curves of Raca for still air and forced air such as illustrated in Figure 22. For example the 6012B heat sink has an Reca = 17C/W at 500 LFPM as noted in Figure 22. From equation (6): Max Raja = S0C/W + 17C/W = 67C/W From equation (3) at Ta = +70C 175C 70C Pp = .~---_ 1.57 watts. FIGURE 22 THERMAL RESISTANCE Roca versus AIR VELOCITY HEAT SINK OP THERMALLOY =6012B HEAT SINK OR EQUIV | DIP WITH THERMALLO =6007A T SINK OR Vv Rua, THERMAL RESISTANCE CASE TO AMBIENT (CAWATT} 0 200 400 600 800 1000 AIR VELOCITY (LINEAR FEET PEF MINUTE) 4-61 As before this yields a safe operating area under Curve E in Figure 18. Note from Table 1 and Figure 21 that if the 14-pin ceramic package is mounted directly to the PC board (2 oz. cu. underneath), that typical Raja is considerably less than for socket mount with still air and no heat sink. The following procedure can be employed to determine a safe operating area for this condition. Given data from Table 1: typical Raja = 100C/w typical Re yc = 279C/W From Curve 2 of Figure 21, Raja(typ) is 75C/W for a PC mount and no air flow. Then the typical Rgca is 75C/W 27C/W = 48C/W. From Table 1 the typical value of Raca for socket mount is 100C/W 27C/W = 73C/W. This shows that the PC board mount results in a decrease in typical Raca by a ratio of 1:1.5 below the typical value of Rgaca in a socket mount. Therefore, the maximum value of socket mount Rgca of 100C/W should also decrease by a ratio of 1:1.5 when the device is mounted in aPC board. The maximum Rg ca becomes: 100C/W 5 = 66C/W.for PC board mount ROCA = Therefore the maximum Raja for a PC mount is from equation (6). Rosa = 50C/W + 66C/W = 116C/W. With maximum Rg@ya, known, the maximum power dis- sipation can be found and the safe operating area de- termined as before. See Curve B in Figure 18. CONCLUSION In most cases, heat sink manufacturers publish only R@CA socket mount data. Although Rgca data for PC mounting is generally not available, this should present no problem. Note in Figure 21 that an air flow greater than 250 LFPM yields a socket mount Rg Ja approxi- mately 6% greater than for a PC mount. Therefore, the socket mount data can be used for a PC mount with a slightly greater safety factor. Also it should be noted that thermal resistance measurements can vary widely. These Measurement variations are due to the dependency of RCA on the type environment and measurement tech- niques employed. For example, Rgaca would be greater for an integrated circuit mounted on a PC board with little or no ground plane versus one with a substantia! ground plane. Therefore, if the maximum calculated junction temperature is on the border line of being too high for a given system application, then thermal resistance measure- ments should be done on the system to be absolutely certain that the maximum junction temperature is not exceeded.MMH0026, MMHO0026C TYPICAL APPLICATIONS FIGURE 23 AC-COUPLED Mos CLOCK DRIVER Veo" +5V ole 3 L- vo Cu Two-Phase T Clock to = Shift Registers of tt De MC7400 Series Gatos Cu , Veg = -12V Pins not shown are not connected. FIGURE 24 OC-COUPLED RAM MEMORY ADDRESS OR PRECHARGE DRIVER (POSITIVE-SUPPLY ONLY) vy Voc Vo a: ot Ffeasaom he, Rin Lines On 1103 Type a Memory System Det i = MTTL MC7400 vv Series Gates Pins not shown are not connected. 4-62