
CLOCK
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RALTRON ELECTRONICS CORP. ! 10651 N.W. 19th St ! Miami, Florida 33172 ! U.S.A.
phone: (305) 593-6033 ! fax: (305) 594-3973 ! e-mail: sales@raltron.com ! WEB: http://www.raltron.com
CLD/CLDP SERIES: CLOCK OSCILLATOR, LVDS, +3.3 VDC or +2.5VDC
DESCRIPTION: A crystal controlled, high frequency, highly stable oscillato r, adhering to Low Voltage
Differential Signaling (LVDS) Standa rds. The output can be Tri-stated to facilita t e testing or combined multiple
clocks. The device is contained in a sub-miniature, very low profile, leadless ceramic SMD package with 6 gold
contact pads. This miniature oscillator is ideal for today's automated assembly environments.
APPLICATIONS AND FEATURES:
" Infiniband; 10GbE; Network Processors; SOHO Routing; Switches; WAN Interfaces
" Common Frequencies: 106.25 MHz; 125 MH z; 150 MHz; 155.52 MH z; 156.25 MHz; 161.1328 MH z
" +3.3 VDC or +2.5VDC LVDS
" Frequency Range from 50.000 to 315 MHz
" No multiplication
" Miniature Ceramic SMD Package Available on Tape and Reel
" Lead Free and ROHS Compliant
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ABSOLUTE MAXIMUM RATINGS:
PARAM ETER SYMBOL VALUE UNIT
Operating temperature range Ta -40…+85 °C
Storage temperature range T(stg) -55…+90 °C
Supply voltage Vcc -0.5…+5.0 VDC
Maximum I nput Voltage Vi Vss -0. 5…Vcc+0. 5 VDC
Maximum Output Voltage Vo Vss -0. 5…Vcc+0. 5 VDC
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ELECTRICAL PARAMETERS:
PA RAMETER SYMBO
L TEST CONDITIONS*1 VALUE UNIT
Nominal Frequency fo 50.000 ~ 315.00** MHz
Supply Vol t age Vcc +3.3 or +2.5 ±5% VDC
Supply Current Is 80.0 MAX mA
Output Logic Type LVDS
Load Connected bet ween Out and Complem entary Out 100 Ω
Voh Output logic high 1.43 Typ, 1.6 Max VDC
Vol Output logic low 0.9 Min, 1.10 Typ VDC
Vod Differential output 247 Min, 330 Typ, 454 Max mV
Different i al output error 50 Max mV
VOS Offset Voltage 1.125 Min, 1.25 Typ, 1.375 Max VDC
Output Levels
OS Offset error 50 Max mV
Duty Cycle DC Measured at 50% of Vcc 40/60 to 60/40 or 45/55 to 55/45 %
Rise / Fall Ti me tr / tf Measured at 20/80% and 80/ 20% Vcc Level s 0.6 TYP *2 ns
Integrated P hase tji RMS, Fj = 12 kHz…20 MHz 0.3 TYP** ps
Integrated Phase RMS ti i offset frequency 50KHz t o
80MHz 0.5 TYP** ps
Determ i ni stic peri od Jitter tdj using wavecres t analyz. 0.0TYP ** ps
Random period Jitter trj using wavecrest analyz. 2.5 TYP ** ps
Jitter
J
Peak to Peak Jitter Tp-p using wavecres t analyz. 25 TYP** ps
Phase Noise typ.
@155.52MHz
£(∆f)
£(∆f)
£(∆f)
£(∆f)
∆f=10 Hz
∆f=1 KHz
∆f=10 KHz
∆f ≥100 KHz
-65
-120
-140
-145
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Overall Frequency Stability ∆f/fc Op. Temp. , Aging, Load, Supply and Cal. V ari at i ons ±20, ±25, ±50, or ±100 MAX*3 Ppm
Pin 1 Output E nabl ed
Output Disabled En
Dis High V ol tage or No Connect
Ground 0.7•Vcc MIN
0.3•Vcc MAX VDC
VDC
*1 Test Condit i ons Unless S tated Otherwise: Nominal V cc, Nominal Load, +25 ±3°C
*2 Frequency Dependent
*3 Not All Stabilit ies Available With All Temperature Ranges—Please Consult Factory For Availability