IRF540NS
IRF540NL
HEXFET® Power MOSFET
07/01/05
www.irf.com 1
VDSS = 100V
RDS(on) = 44m
ID = 33A
S
D
G
Advanced HEXFET® Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRF540NL) is available for low-
profile applications.
lAdvanced Process Technology
lUltra Low On-Resistance
lDynamic dv/dt Rating
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
Description
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 33
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 23 A
IDM Pulsed Drain Current  110
PD @TC = 25°C Power Dissipation 130 W
Linear Derating Factor 0.87 W/°C
VGS Gate-to-Source Voltage ± 20 V
IAR Avalanche Current16 A
EAR Repetitive Avalanche Energy13 mJ
dv/dt Peak Diode Recovery dv/dt  7.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
D2Pak
IRF540NS
TO-262
IRF540NL
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.15
RθJA Junction-to-Ambient (PCB mount)** ––– 40
Thermal Resistance
°C/W
PD - 91342B
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S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.2 V TJ = 25°C, IS = 16A, VGS = 0V
trr Reverse Recovery Time ––– 115 170 ns TJ = 25°C, IF = 16A
Qrr Reverse Recovery Charge ––– 505 760 nC di/dt = 100A/µs 
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
33
110
A
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Starting TJ = 25°C, L =1.5mH
RG = 25, IAS = 16A. (See Figure 12)
ISD 16A, di/dt 340A/µs, VDD V(BR)DSS,
TJ 175°C
Pulse width 400µs; duty cycle 2%.
Notes:
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to TJ = 175°C .
Uses IRF540N data and test conditions.
**When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniques refer to application
note #AN-994
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJBreakdown Voltage Temp. Coefficient ––– 0.12 –– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 44 mVGS = 10V, ID = 16A
VGS(th) Gate Threshold Voltage 2.0 –– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 21 ––– ––– S VDS = 50V, ID = 16A
––– ––– 25 µA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– –– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -20V
QgTotal Gate Charge –– –– 71 ID = 16A
Qgs Gate-to-Source Charge ––– –– 14 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– –– 21 VGS = 10V, See Fig. 6 and 13 
td(on) Turn-On Delay Time ––– 11 ––– VDD = 50V
trRise Time ––– 35 ––– ID = 16A
td(off) Turn-Off Delay Time ––– 39 ––– RG = 5.1
tfFall Time ––– 35 ––– VGS = 10V, See Fig. 10
Between lead,
––– ––– 6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 1960 ––– VGS = 0V
Coss Output Capacitance –– 250 –– VDS = 25V
Crss Reverse Transfer Capacitance ––– 40 ––– pF ƒ = 1.0MHz, See Fig. 5
EAS Single Pulse Avalanche Energy ––– 700185mJ IAS = 16A, L = 1.5mH
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance ––– –––
S
D
G
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
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Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
33A
1
10
100
1000
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
1000
0.1 1 10 100
20µs PULSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
10
100
1000
4.0 5.0 6.0 7.0 8.0 9.0
V = 50V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1 10 100
0
500
1000
1500
2000
2500
3000
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss gs gd , ds
rss gd
oss ds gd
Ciss
Coss
Crss
020 40 60 80
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
16A
V = 20V
DS
V = 50V
DS
V = 80V
DS
0.1
1
10
100
1000
0.2 0.6 1.0 1.4 1.8
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 175 C
J°
1 10 100 1000
VDS , Drain-toSource Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TA = 25°C
TJ = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor 0.1 %
RD
VGS
RG
D.U.T.
VGS
+
-
VDD
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
25 50 75 100 125 150 175
0
5
10
15
20
25
30
35
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
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QG
QGS QGD
VG
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
VGS
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
25 50 75 100 125 150 175
0
100
200
300
400
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
6.5A
11.3A
16A
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Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
RG
VDD
dv/dt controlled by RG
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T*Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
* Reverse Polarity of D.U.T for P-Channel
VGS
[ ]
[ ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[ ] ***
Fig 14. For N-channel HEXFET® power MOSFETs
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D2Pak Part Marking Information
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
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TO-262 Part Marking Information
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
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OR
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Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.07/05
D2Pak Tape & Reel Information
3
4
4
TRR
FEED DIRECTION
1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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