LM27341,LM27342
LM27341/LM27342/LM27341Q/LM27342Q 2 MHz 1.5A/2A Wide Input Range
Step-Down DC-DC Regulator with Frequency Synchronization
Literature Number: SNVS497D
LM27341/LM27342/
LM27341Q/LM27342Q
February 9, 2010
2 MHz 1.5A/2A Wide Input Range Step-Down DC-DC
Regulator with Frequency Synchronization
General Description
The LM27341 and LM27342 regulators are monolithic, high
frequency, PWM step-down DC-DC converters in 10-pin LLP
and 10-pin eMSOP packages. They contain all the active
functions to provide local DC-DC conversion with fast tran-
sient response and accurate regulation in the smallest possi-
ble PCB area.
With a minimum of external components the LM27341 and
LM27342 are easy to use. The ability to drive 1.5A or 2A loads
respectively, with an internal 150 mΩ NMOS switch results in
the best power density available. The world-class control cir-
cuitry allows for on-times as low as 65 ns, thus supporting
exceptionally high frequency conversion. Switching frequen-
cy is internally set to 2 MHz and synchronizable from 1 to 2.35
MHz, which allows the use of extremely small surface mount
inductors and chip capacitors. Even though the operating fre-
quency is very high, efficiencies up to 90% are easy to
achieve. External shutdown is included featuring an ultra-low
shutdown current of 70 nA. The LM27341and LM27342 utilize
peak current-mode control and internal compensation to pro-
vide high-performance regulation over a wide range of oper-
ating conditions. Additional features include internal soft-start
circuitry to reduce inrush current, pulse-by-pulse current limit,
thermal shutdown, and output over-voltage protection.
Features
■Space saving 3 x 3 mm LLP-10 & eMSOP-10 package
■Wide input voltage range 3V to 20V
■Wide output voltage range 1V to 18V
■LM27341 delivers 1.5A maximum output current
■LM27342 delivers 2A maximum output current
■High switching frequency 2 MHz
■Frequency synchronization 1.00 MHz < fSW <
2.35 MHz
■150 mΩ NMOS switch with internal bootstrap supply
■70 nA shutdown current
■Internal voltage reference accuracy of 1%
■Peak Current-Mode, PWM operation
■Thermal shutdown
■LM27341Q and LM27342Q are AEC-Q100 Grade 1
qualified and are manufactured on an Automotive Grade
Flow
Applications
■Local 12V to Vcore Step-Down Converters
■Radio Power Supply
■Core Power in HDDs
■Set-Top Boxes
■Automotive
■USB Powered Devices
■DSL Modems
Typical Application Circuit
30005674
30005676
Efficiency vs Load Current
VOUT = 5V, fsw = 2 MHz
© 2010 National Semiconductor Corporation 300056 www.national.com
LM27341/LM27342/LM27341Q/LM27342Q 2 MHz 1.5/2A Wide Input Range Step-Down DC-DC
Regulator with Frequency Synchronization
Connection Diagrams
Top View
30005604
10 - Lead LLP
Top View
30005605
10 - Lead eMSOP
Ordering Information
Order Number Package
Type
NSC Package
Drawing
Package
Marking
Supplied As Feature
LM27341MY eMSOP -10 MUC10A SSCB 1000 Units on Tape and Reel
LM27341MYX eMSOP -10 MUC10A SSCB 3500 Units on Tape and Reel
LM27342MY eMSOP -10 MUC10A SSCA 1000 Units on Tape and Reel
LM27342MYX eMSOP -10 MUC10A SSCA 3500 Units on Tape and Reel
LM27341SD LLP - 10 SDA10A L231B 1000 Units on Tape and Reel
LM27341SDX LLP - 10 SDA10A L231B 4500 Units on Tape and Reel
LM27342SD LLP - 10 SDA10A L231A 1000 Units on Tape and Reel
LM27342SDX LLP - 10 SDA10A L231A 4500 Units on Tape and Reel
LM27341QMY eMSOP -10 MUC10A SSJB 1000 Units Per Anti-Static Tube AEC-Q100 Grade 1
qualified. Automotive
Grade Production Flow*
LM27341QMYX eMSOP -10 MUC10A SSJB 3500 Units on Tape and Reel
LM27342QMY eMSOP -10 MUC10A SSJA 1000 Units Per Anti-Static Tube
LM27342QMYX eMSOP -10 MUC10A SSJA 3500 Units on Tape and Reel
*Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, including defect detection methodologies.
Reliability qualification is compliant with the requirements and temperature grades defined in the AEC-Q100 standard. Automotive grade products are identified
with the letter Q. For more information go to http://www.national.com/automotive.
Pin Descriptions
Pin Name Function
1,2 SW Output switch. Connects to the inductor, catch diode, and bootstrap capacitor.
3 BOOST Boost voltage that drives the internal NMOS control switch. A bootstrap capacitor is connected between
the BOOST and SW pins.
4 EN Enable control input. Logic high enables operation. Do not allow this pin to float or be greater than VIN
+ 0.3V.
5 SYNC Frequency synchronization input. Drive this pin with an external clock or pulse train. Ground it to use
the internal clock.
6 FB Feedback pin. Connect FB to the external resistor divider to set output voltage.
7 GND Signal and Power Ground pin. Place the bottom resistor of the feedback network as close as possible
to this pin for accurate regulation.
8 AVIN Supply voltage for the control circuitry.
9,10 PVIN Supply voltage for output power stage. Connect a bypass capacitor to this pin.
DAP GND Signal / Power Ground and thermal connection. Tie this directly to GND (pin 7). See Application
Information regarding optimum thermal layout.
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LM27341/LM27342
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
AVIN, PVIN -0.5V to 24V
SW Voltage -0.5V to 24V
Boost Voltage -0.5V to 28V
Boost to SW Voltage -0.5V to 6.0V
FB Voltage -0.5V to 3.0V
SYNC Voltage -0.5V to 6.0V
EN Voltage -0.5V to (VIN + 0.3V)
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
ESD Susceptibility (Note 2) 2kV
Soldering Information
Infrared Reflow (5sec) 260°C
Operating Ratings (Note 1)
AVIN, PVIN 3V to 20V
SW Voltage -0.5V to 20V
Boost Voltage -0.5V to 24V
Boost to SW Voltage 3.0V to 5.5V
Junction Temperature Range −40°C to +125°C
Thermal Resistance (θJA) LLP10 (Note 3)33°C/W
Thermal Resistance (θJA) eMSOP10 (Note 3)45°C/W
Electrical Characteristics
Specifications with standard typeface are for TJ = 25°C, and those in boldface type apply over the full Operating Temperature
Range (TJ = -40°C to 125°C). VIN = 12V, and VBOOST - VSW = 4.3V unless otherwise specified. Datasheet min/max specification
limits are guaranteed by design, test, or statistical analysis.
Symbol Parameter Conditions Min Typ Max Units
SYSTEM PARAMETERS
VFB Feedback Voltage TJ = 0°C to 85°C 0.990 1.0 1.010 V
TJ = -40°C to 125°C 0.984 1.0 1.014
ΔVFB/ΔVIN Feedback Voltage Line Regulation VIN = 3V to 20V 0.003 % / V
IFB Feedback Input Bias Current 20 100 nA
OVP Over Voltage Protection, VFB at
which PWM Halts.
1.13 V
UVLO Undervoltage Lockout VIN Rising until VSW is Switching 2.60 2.75 2.90 V
UVLO Hysteresis VIN Falling from UVLO 0.30 0.47 0.6
SS Soft Start Time 0.5 1 1.5 ms
IQ
Quiescent Current, IQ = IQ_AVIN +
IQ_PVIN
VFB = 1.1 (not switching) 2.4 mA
Quiescent Current, IQ = IQ_AVIN +
IQ_PVIN
VEN = 0V (shutdown) 70 nA
IBOOST Boost Pin Current fSW= 2 MHz 8.2 10 mA
fSW= 1 MHz 4.4 6
OSCILLATOR
fSW Switching Frequency SYNC = GND 1.75 22.3 MHz
VFB_FOLD
FB Pin Voltage where SYNC input
is overridden. 0.53 V
fFOLD_MIN Frequency Foldback Minimum VFB = 0V 220 250 kHz
LOGIC INPUTS (EN, SYNC)
fSYNC SYNC Frequency Range 1 2.35 MHz
VIL EN, SYNC Logic low threshold Logic Falling Edge 0.4 V
VIH EN, SYNC Logic high threshold Logic Rising Edge 1.8
tSYNC_HIGH
SYNC, Time Required above VIH to
Ensure a Logical High. 100 ns
tSYNC_LOW
SYNC, Time Required below VIL to
Ensure a Logical Low. 100 ns
ISYNC SYNC Pin Current VSYNC < 5V 20 nA
IEN Enable Pin Current VEN = 3V 6 15 µA
VIN = VEN = 20V 50 100
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LM27341/LM27342
Symbol Parameter Conditions Min Typ Max Units
INTERNAL MOSFET
RDS(ON) Switch ON Resistance 150 320 mΩ
ICL Switch Current Limit LM27342 2.5 4.0 A
LM27341 2.0 3.7
DMAX Maximum Duty Cycle SYNC = GND 85 93 %
tMIN Minimum on time 65 ns
ISW Switch Leakage Current 40 nA
BOOST LDO
VLDO Boost LDO Output Voltage 3.9 V
THERMAL
TSHDN Thermal Shutdown Temperature Junction temperature rising 165 °C
Thermal Shutdown Hysteresis Junction temperature falling 15 °C
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the recommended Operating Ratings is not implied. The recommended Operating Ratings indicate conditions at which the device is functional and should not be
operated beyond such conditions.
Note 2: Human body model, 1.5 kΩ in series with 100 pF.
Note 3: Thermal shutdown will occur if the junction temperature exceeds 165°C. The maximum power dissipation is a function of TJ(MAX) , θJA and TA . The
maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/θJA . All numbers apply for packages soldered directly onto a 3” x 3” PC
board with 2oz. copper on 4 layers in still air.
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LM27341/LM27342
Typical Performance Characteristics All curves taken at VIN = 12V, VBOOST - VSW = 4.3V and
TA = 25°C, unless specified otherwise.
Efficiency vs Load Current
VOUT = 5V, fSW = 2 MHz
Refer to Figure 10
30005676
Load Transient
VOUT = 5V, IOUT = 100 mA - 2A @ slewrate = 2A / µs
Refer to Figure 10
300056100
Efficiency vs Load Current
VOUT = 3.3V, fSW = 2 MHz
Refer to Figure 12
30005680
Load Transient
VOUT = 3.3V, IOUT = 100 mA - 2A @ slewrate = 2A / µs
Refer to Figure 12
300056102
Efficiency vs Load Current
VOUT = 1.8V, fSW = 2 MHz
Refer to Figure 15
30005684
Load Transient
VOUT = 1.8V, IOUT = 100 mA - 2A @ slewrate = 2A / µs
Refer to Figure 15
300056105
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LM27341/LM27342
VIN = 12V, VOUT = 5 V, L = 2.2 µH, COUT = 44 µF Iout =1A
Refer to Figure 10
300056112
VIN = 12V, VOUT = 3.3V, L = 1.5 µH COUT = 44 µF Iout =1A
Refer to Figure 12
300056113
VIN = 5V, VOUT = 1.8V, L = 1.0 µH COUT = 44 µF Iout =1A
Refer to Figure 15
300056114
VIN = 5V, VOUT = 1.2V, L = 0.56 µH COUT = 68 µF Iout =1A
Refer to Figure 17
300056115
Sync Functionality
30005655
Loss of Synchronization
30005656
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LM27341/LM27342
Oscillator Frequency vs Temperature
VSYNC = GND, fSW = 2 MHz
30005628
Oscillator Frequency vs VFB
30005629
VFB vs Temperature
30005630
VFB vs VIN
30005631
Current Limit vs Temperature
VIN = 12V
30005632
RDSON vs Temperature
30005633
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LM27341/LM27342
IQ (Shutdown) vs Temperature
IQ = IAVIN + IPVIN
30005634
IEN vs VEN
30005635
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LM27341/LM27342
Block Diagram
30005698
FIGURE 1.
Application Information
THEORY OF OPERATION
The LM27341/LM27342 is a constant-frequency, peak cur-
rent-mode PWM buck regulator IC that delivers a 1.5 or 2A
load current. The regulator has a preset switching frequency
of 2 MHz. This high frequency allows the LM27341/LM27342
to operate with small surface mount capacitors and inductors,
resulting in a DC-DC converter that requires a minimum
amount of board space. The LM27341/LM27342 is internally
compensated, which reduces design time, and requires few
external components.
The following operating description of the LM27341/LM27342
will refer to the Block Diagram (Figure 1) and to the waveforms
in Figure 2. The LM27341/LM27342 supplies a regulated out-
put voltage by switching the internal NMOS switch at a con-
stant frequency and varying the duty cycle. A switching cycle
begins at the falling edge of the reset pulse generated by the
internal oscillator. When this pulse goes low, the output con-
trol logic turns on the internal NMOS switch. During this on-
time, the SW pin voltage (VSW) swings up to approximately
VIN, and the inductor current (iL) increases with a linear slope.
The current-sense amplifier measures iL, which generates an
output proportional to the switch current typically called the
sense signal. The sense signal is summed with the regulator’s
corrective ramp and compared to the error amplifier’s output,
which is proportional to the difference between the feedback
voltage (VFB) and VREF. When the output of the PWM com-
parator goes high, the switch turns off until the next switching
cycle begins. During the switch off-time (tOFF), inductor cur-
rent discharges through the catch diode D1, which forces the
SW pin (VSW) to swing below ground by the forward voltage
(VD1) of the catch diode. The regulator loop adjusts the duty
cycle (D) to maintain a constant output voltage.
30005607
FIGURE 2. LM27341/LM27342 Waveforms of SW Pin
Voltage and Inductor Current
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LM27341/LM27342
BOOST FUNCTION
Capacitor C2 in Figure 1, commonly referred to as CBOOST, is
used to store a voltage VBOOST. When the LM27341/LM27342
starts up, an internal LDO charges CBOOST ,via an internal
diode, to a voltage sufficient to turn the internal NMOS switch
on. The gate drive voltage supplied to the internal NMOS
switch is VBOOST - VSW.
During a normal switching cycle, when the internal NMOS
control switch is off (tOFF) (refer to Figure 2), VBOOST equals
VLDO minus the forward voltage of the internal diode (VD2). At
the same time the inductor current (iL) forward biases the
catch diode D1 forcing the SW pin to swing below ground by
the forward voltage drop of the catch diode (VD1). Therefore,
the voltage stored across CBOOST is
VBOOST - VSW = VLDO - VD2 + VD1
Thus,
VBOOST = VSW + VLDO - VD2 + VD1
When the NMOS switch turns on (tON), the switch pin rises to
VSW = VIN – (RDSON x IL),
reverse biasing D1, and forcing VBOOST to rise. The voltage
at VBOOST is then
VBOOST = VIN – (RDSON x IL) + VLDO – VD2 + VD1
which is approximately
VIN + VLDO- 0.4V
VBOOST has pulled itself up by its "bootstraps", or boosted to
a higher voltage.
LOW INPUT VOLTAGE CONSIDERATIONS
When the input voltage is below 5V and the duty cycle is
greater than 75 percent, the gate drive voltage developed
across CBOOST might not be sufficient for proper operation of
the NMOS switch. In this case, CBOOST should be charged via
an external Schottky diode attached to a 5V voltage rail, see
Figure 3. This ensures that the gate drive voltage is high
enough for proper operation of the NMOS switch in the triode
region. Maintain VBOOST - VSW less than the 6V absolute max-
imum rating.
30005626
FIGURE 3. External Diode Charges CBOOST
HIGH OUTPUT VOLTAGE CONSIDERATIONS
When the output voltage is greater than 3.3V, a minimum load
current is needed to charge CBOOST, see Figure 4. The mini-
mum load current forward biases the catch diode D1 forcing
the SW pin to swing below ground. This allows CBOOST to
charge, ensuring that the gate drive voltage is high enough
for proper operation. The minimum load current depends on
many factors including the inductor value.
30005636
FIGURE 4. Minimum Load Current for L = 1.5 µH
ENABLE PIN / SHUTDOWN MODE
Connect the EN pin to a voltage source greater than 1.8V to
enable operation of the LM27341/LM27342. Apply a voltage
less than 0.4V to put the part into shutdown mode. In shut-
down mode the quiescent current drops to typically 70 nA.
Switch leakage adds another 40 nA from the input supply. For
proper operation, the LM27341/LM27342 EN pin should nev-
er be left floating, and the voltage should never exceed VIN +
0.3V.
The simplest way to enable the operation of the LM27341/
LM27342 is to connect the EN pin to AVIN which allows self
start-up of the LM27341/LM27342 when the input voltage is
applied.
When the rise time of VIN is longer than the soft-start time of
the LM27341/LM27342 this method may result in an over-
shoot in output voltage. In such applications, the EN pin
voltage can be controlled by a separate logic signal, or tied to
a resistor divider, which reaches 1.8V after VIN is fully estab-
lished (see Figure 5). This will minimize the potential for
output voltage overshoot during a slow VIN ramp condition.
Use the lowest value of VIN , seen in your application when
calculating the resistor network, to ensure that the 1.8V min-
imum EN threshold is reached.
30005608
FIGURE 5. Resistor Divider on EN
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LM27341/LM27342
FREQUENCY SYNCHRONIZATION
The LM27341/LM27342 switching frequency can be synchro-
nized to an external clock, between 1.00 and 2.35 MHz,
applied at the SYNC pin. At the first rising edge applied to the
SYNC pin, the internal oscillator is overridden and subse-
quent positive edges will initiate switching cycles. If the ex-
ternal SYNC signal is lost during operation, the LM27341/
LM27342 will revert to its internal 2 MHz oscillator within 1.5
µs. To disable Frequency Synchronization and utilize the in-
ternal 2 MHz oscillator, connect the SYNC pin to GND.
The SYNC pin gives the designer the flexibility to optimize
their design. A lower switching frequency can be chosen for
higher efficiency. A higher switching frequency can be chosen
to keep EMI out of sensitive ranges such as the AM radio
band. Synchronization can also be used to eliminate beat fre-
quencies generated by the interaction of multiple switching
power converters. Synchronizing multiple switching power
converters will result in cleaner power rails.
The selected switching frequency (fSYNC) and the minimum
on-time (tMIN) limit the minimum duty cycle (DMIN) of the de-
vice.
DMIN= tMIN x fSYNC
Operation below DMIN is not reccomended. The LM27341/
LM27342 will skip pulses to keep the output voltage in regu-
lation, and the current limit is not guaranteed. The switching
is in phase but no longer at the same switching frequency as
the SYNC signal.
CURRENT LIMIT
The LM27341 and LM27342 use cycle-by-cycle current lim-
iting to protect the output switch. During each switching cycle,
a current limit comparator detects if the output switch current
exceeds 2.0A min (LM27341) or 2.5A min (LM27342) , and
turns off the switch until the next switching cycle begins.
FREQUENCY FOLDBACK
The LM27341/LM27342 employs frequency foldback to pro-
tect the device from current run-away during output short-
circuit. Once the FB pin voltage falls below regulation, the
switch frequency will smoothly reduce with the falling FB volt-
age until the switch frequency reaches 220 kHz (typ). If the
device is synchronized to an external clock, synchronization
is disabled until the FB pin voltage exceeds 0.53V
SOFT-START
The LM27341/LM27342 has a fixed internal soft-start of 1 ms
(typ). During soft-start, the error amplifier’s reference voltage
ramps from 0.0 V to its nominal value of 1.0 V in approximately
1 ms. This forces the regulator output to ramp in a controlled
fashion, which helps reduce inrush current. Upon soft-start
the part will initially be in frequency foldback and the frequen-
cy will rise as FB rises. The regulator will gradually rise to 2
MHz. The LM27341/LM27342 will allow synchronization to an
external clock at FB > 0.53V.
OUTPUT OVERVOLTAGE PROTECTION
The overvoltage comparator turns off the internal power
NFET when the FB pin voltage exceeds the internal reference
voltage by 13% (VFB > 1.13 * VREF). With the power NFET
turned off the output voltage will decrease toward the regula-
tion level.
UNDERVOLTAGE LOCKOUT
Undervoltage lockout (UVLO) prevents the LM27341/
LM27342 from operating until the input voltage exceeds
2.75V(typ).
The UVLO threshold has approximately 470 mV of hysteresis,
so the part will operate until VIN drops below 2.28V(typ). Hys-
teresis prevents the part from turning off during power up if
VIN has finite impedance.
THERMAL SHUTDOWN
Thermal shutdown limits total power dissipation by turning off
the internal NMOS switch when the IC junction temperature
exceeds 165°C (typ). After thermal shutdown occurs, hys-
teresis prevents the internal NMOS switch from turning on
until the junction temperature drops to approximately 150°C.
Design Guide
INDUCTOR SELECTION
Inductor selection is critical to the performance of the
LM27341/LM27342. The selection of the inductor affects sta-
bility, transient response and efficiency. A key factor in induc-
tor selection is determining the ripple current (ΔiL) (see Figure
2).
The ripple current (ΔiL) is important in many ways.
First, by allowing more ripple current, lower inductance values
can be used with a corresponding decrease in physical di-
mensions and improved transient response. On the other
hand, allowing less ripple current will increase the maximum
achievable load current and reduce the output voltage ripple
(see Output Capacitor section for more details on calculating
output voltage ripple). Increasing the maximum load current
is achieved by ensuring that the peak inductor current (ILPK)
never exceeds the minimum current limit of 2.0A min
(LM27341) or 2.5A min (LM27342) .
ILPK = IOUT + ΔiL / 2
Secondly, the slope of the ripple current affects the current
control loop. The LM27341/LM27342 has a fixed slope cor-
rective ramp. When the slope of the current ripple becomes
significantly less than the converter’s corrective ramp (see
Figure 1), the inductor pole will move from high frequencies
to lower frequencies. This negates one advantage that peak
current-mode control has over voltage-mode control, which
is, a single low frequency pole in the power stage of the con-
verter. This can reduce the phase margin, crossover frequen-
cy and potentially cause instability in the converter. Contrarily,
when the slope of the ripple current becomes significantly
greater than the converter’s corrective ramp, resonant peak-
ing can occur in the control loop. This can also cause insta-
bility (Sub-Harmonic Oscillation) in the converter. For the
power supply designer this means that for lower switching
frequencies the current ripple must be increased to keep the
inductor pole well above crossover. It also means that for
higher switching frequencies the current ripple must be de-
creased to avoid resonant peaking.
With all these factors, how is the desired ripple current se-
lected? The ripple ratio (r) is defined as the ratio of inductor
ripple current (ΔiL) to output current (IOUT), evaluated at max-
imum load:
A good compromise between physical size, transient re-
sponse and efficiency is achieved when we set the ripple ratio
between 0.2 and 0.4. The recommended ripple ratio vs. duty
cycle shown below (see Figure 6) is based upon this com-
promise and control loop optimizations. Note that this is just
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LM27341/LM27342
a guideline. Please see Application note AN-1197 for further
considerations.
30005627
FIGURE 6. Recommended Ripple Ratio Vs. Duty Cycle
The Duty Cycle (D) can be approximated quickly using the
ratio of output voltage (VOUT) to input voltage (VIN):
The application's lowest input voltage should be used to cal-
culate the ripple ratio. The catch diode forward voltage drop
(VD1) and the voltage drop across the internal NFET (VDS)
must be included to calculate a more accurate duty cycle.
Calculate D by using the following formula:
VDS can be approximated by:
VDS = IOUT x RDS(ON)
The diode forward drop (VD1) can range from 0.3V to 0.5V
depending on the quality of the diode. The lower VD1 is, the
higher the operating efficiency of the converter.
Now that the ripple current or ripple ratio is determined, the
required inductance is calculated by:
where DMIN is the duty cycle calculated with the maximum
input voltage, fsw is the switching frequency, and IOUT is the
maximum output current of 2A. Using IOUT = 2A will minimize
the inductor's physical size.
INDUCTOR CALCULATION EXAMPLE
Operating conditions for the LM27342 are:
VIN = 7 - 16V VOUT = 3.3V IOUT = 2A
fSW = 2 MHz VD1 = 0.5V
First the maximum duty cycle is calculated.
DMAX = (VOUT + VD1) / (VIN + VD1 - VDS)
= (3.3V + 0.5V) / (7V + 0.5V - 0.30V)
= 0.528
Using Figure 6 gives us a recommended ripple ratio = 0.4.
Now the minimum duty cycle is calculated.
DMIN = (VOUT + VD1) / (VIN + VD1 - VDS)
= (3.3V + 0.5V) / (16V + 0.5V - 0.30V)
= 0.235
The inductance can now be calculated.
L = (1 - DMIN) x (VOUT + VD1) / (IOUT x r x fsw)
= (1 - 0.235) x (3.3V + .5V) / (2A x 0.4 x 2 MHz)
= 1.817 µH
This is close to the standard inductance value of 1.8 µH. This
leads to a 1% deviation from the recommended ripple ratio,
which is now 0.4038.
Finally, we check that the peak current does not reach the
minimum current limit of 2.5A.
ILPK = IOUT x (1 + r / 2)
= 2A x (1 + .4038 / 2 )
= 2.404A
The peak current is less than 2.5A, so the DC load specifica-
tion can be met with this ripple ratio. To design for the
LM27341 simply replace IOUT = 1.5A in the equations for
ILPK and see that ILPK does not exceed the LM27341's current
limit of 2.0A (min).
INDUCTOR MATERIAL SELECTION
When selecting an inductor, make sure that it is capable of
supporting the peak output current without saturating. Induc-
tor saturation will result in a sudden reduction in inductance
and prevent the regulator from operating correctly. To prevent
the inductor from saturating over the entire -40 °C to 125 °C
range, pick an inductor with a saturation current higher than
the upper limit of ICL listed in the Electrical Characteristics ta-
ble.
Ferrite core inductors are recommended to reduce AC loss
and fringing magnetic flux. The drawback of ferrite core in-
ductors is their quick saturation characteristic. The current
limit circuit has a propagation delay and so is oftentimes not
fast enough to stop a saturated inductor from going above the
current limit. This has the potential to damage the internal
switch. To prevent a ferrite core inductor from getting into sat-
uration, the inductor saturation current rating should be higher
than the switch current limit ICL. The LM27341/LM27342 is
quite robust in handling short pulses of current that are a few
amps above the current limit. Saturation protection is provid-
ed by a second current limit which is 30% higher than the
cycle by cycle current limit. When the saturation protection is
triggered the part will turn off the output switch and attempt to
soft-start. (When a compromise has to be made, pick an in-
ductor with a saturation current just above the lower limit of
the ICL.) Be sure to validate the short-circuit protection over
the intended temperature range.
An inductor's saturation current is usually lower when hot. So
consult the inductor vendor if the saturation current rating is
only specified at room temperature.
Soft saturation inductors such as the iron powder types can
also be used. Such inductors do not saturate suddenly and
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LM27341/LM27342
therefore are safer when there is a severe overload or even
shorted output. Their physical sizes are usually smaller than
the Ferrite core inductors. The downside is their fringing flux
and higher power dissipation due to relatively high AC loss,
especially at high frequencies.
INPUT CAPACITOR
An input capacitor is necessary to ensure that VIN does not
drop excessively during switching transients. The primary
specifications of the input capacitor are capacitance, voltage,
RMS current rating, and Equivalent Series Inductance (ESL).
The recommended input capacitance is 10 µF, although 4.7
µF works well for input voltages below 6V. The input voltage
rating is specifically stated by the capacitor manufacturer.
Make sure to check any recommended deratings and also
verify if there is any significant change in capacitance at the
operating input voltage and the operating temperature. The
input capacitor maximum RMS input current rating (IRMS-IN)
must be greater than:
where r is the ripple ratio defined earlier, IOUT is the output
current, and D is the duty cycle. It can be shown from the
above equation that maximum RMS capacitor current occurs
when D = 0.5. Always calculate the RMS at the point where
the duty cycle, D, is closest to 0.5. The ESL of an input ca-
pacitor is usually determined by the effective cross sectional
area of the current path. A large leaded capacitor will have
high ESL and a 0805 ceramic chip capacitor will have very
low ESL. At the operating frequencies of the LM27341/
LM27342, certain capacitors may have an ESL so large that
the resulting impedance (2πfL) will be higher than that re-
quired to provide stable operation. As a result, surface mount
capacitors are strongly recommended. Sanyo POSCAP, Tan-
talum or Niobium, Panasonic SP or Cornell Dubilier Low ESR
are all good choices for input capacitors and have acceptable
ESL. Multilayer ceramic capacitors (MLCC) have very low
ESL. For MLCCs it is recommended to use X7R or X5R di-
electrics. Consult the capacitor manufacturer's datasheet to
see how rated capacitance varies over operating conditions.
OUTPUT CAPACITOR
The output capacitor is selected based upon the desired out-
put ripple and transient response. The LM27341/2's loop
compensation is designed for ceramic capacitors. A minimum
of 22 µF is required at 2 MHz (33 uF at 1 MHz) while 47 - 100
µF is recommended for improved transient response and
higher phase margin. The output voltage ripple of the con-
verter is:
When using MLCCs, the ESR is typically so low that the ca-
pacitive ripple may dominate. When this occurs, the output
ripple will be approximately sinusoidal and 90° phase shifted
from the switching action. Another benefit of ceramic capac-
itors is their ability to bypass high frequency noise. A certain
amount of switching edge noise will couple through parasitic
capacitances in the inductor to the output. A ceramic capac-
itor will bypass this noise while a tantalum will not.
The transient response is determined by the speed of the
control loop and the ability of the output capacitor to provide
the initial current of a load transient. Capacitance can be in-
creased significantly with little detriment to the regulator sta-
bility. However, increasing the capacitance provides diminin-
shing improvement over 100 uF in most applications,
because the bandwidth of the control loop decreases as out-
put capacitance increases. If improved transient performance
is required, add a feed forward capacitor. This becomes es-
pecially important for higher output voltages where the band-
width of the LM27341/LM27342 is lower. See Feed Forward
Capacitor and Frequency Synchronization sections.
Check the RMS current rating of the capacitor. The RMS cur-
rent rating of the capacitor chosen must also meet the follow-
ing condition:
where IOUT is the output current, and r is the ripple ratio.
CATCH DIODE
The catch diode (D1) conducts during the switch off-time. A
Schottky diode is recommended for its fast switching times
and low forward voltage drop. The catch diode should be
chosen so that its current rating is greater than:
ID1 = IOUT x (1-D)
The reverse breakdown rating of the diode must be at least
the maximum input voltage plus appropriate margin. To im-
prove efficiency choose a Schottky diode with a low forward
voltage drop.
BOOST DIODE (OPTIONAL)
For circuits with input voltages VIN < 5V and duty cycles (D)
>0.75V. a small-signal Schottky diode is recommended. A
good choice is the BAT54 small signal diode. The cathode of
the diode is connected to the BOOST pin and the anode to a
5V voltage rail.
BOOST CAPACITOR
A ceramic 0.1 µF capacitor with a voltage rating of at least
6.3V is sufficient. The X7R and X5R MLCCs provide the best
performance.
OUTPUT VOLTAGE
The output voltage is set using the following equation where
R2 is connected between the FB pin and GND, and R1 is
connected between VOUT and the FB pin. A good starting val-
ue for R2 is 1 kΩ.
FEED FORWARD CAPACITOR (OPTIONAL)
A feed forward capacitor CFF can improve the transient re-
sponse of the converter. Place CFF in parallel with R1. The
value of CFF should place a zero in the loop response at, or
above, the pole of the output capacitor and RLOAD. The CFF
capacitor will increase the crossover frequency of the design,
thus a larger minimum output capacitance is required for de-
signs using CFF. CFF should only be used with an output
capacitance greater than or equal to 44 uF.
www.national.com 14
LM27341/LM27342
Calculating Efficiency, and Junction
Temperature
The complete LM27341/LM27342 DC-DC converter efficien-
cy can be calculated in the following manner.
Or
Calculations for determining the most significant power loss-
es are shown below. Other losses totaling less than 2% are
not discussed.
Power loss (PLOSS) is the sum of two basic types of losses in
the converter, switching and conduction. Conduction losses
usually dominate at higher output loads, where as switching
losses remain relatively fixed and dominate at lower output
loads. The first step in determining the losses is to calculate
the duty cycle (D).
VDS is the voltage drop across the internal NFET when it is
on, and is equal to:
VDS = IOUT x RDSON
VD is the forward voltage drop across the Schottky diode. It
can be obtained from the Electrical Characteristics section of
the schottky diode datasheet. If the voltage drop across the
inductor (VDCR) is accounted for, the equation becomes:
VDCR usually gives only a minor duty cycle change, and has
been omitted in the examples for simplicity.
SCHOTTKY DIODE CONDUCTION LOSSES
The conduction losses in the free-wheeling Schottky diode
are calculated as follows:
PDIODE = VD1 x IOUT (1-D)
Often this is the single most significant power loss in the cir-
cuit. Care should be taken to choose a Schottky diode that
has a low forward voltage drop.
INDUCTOR CONDUCTION LOSSES
Another significant external power loss is the conduction loss
in the output inductor. The equation can be simplified to:
PIND = IOUT2 x RDCR
MOSFET CONDUCTION LOSSES
The LM27341/LM27342 conduction loss is mainly associated
with the internal NFET:
PCOND = IOUT2 x RDSON x D
MOSFET SWITCHING LOSSES
Switching losses are also associated with the internal NFET.
They occur during the switch on and off transition periods,
where voltages and currents overlap resulting in power loss.
The simplest means to determine this loss is to empirically
measuring the rise and fall times (10% to 90%) of the switch
at the switch node:
PSWF = 1/2(VIN x IOUT x fSW x tFALL)
PSWR = 1/2(VIN x IOUT x fSW x tRISE)
PSW = PSWF + PSWR
Typical Rise and Fall Times vs Input Voltage
VIN tRISE tFALL
5V 8ns 8ns
10V 9ns 9ns
15V 10ns 10ns
IC QUIESCENT LOSSES
Another loss is the power required for operation of the internal
circuitry:
PQ = IQ x VIN
IQ is the quiescent operating current, and is typically around
2.4 mA.
MOSFET DRIVER LOSSES
The other operating power that needs to be calculated is that
required to drive the internal NFET:
PBOOST = IBOOST x VBOOST
VBOOST is normally between 3VDC and 5VDC. The IBOOST rms
current is dependant on switching frequency fSW. IBOOST is
approximately 8.2 mA at 2 MHz and 4.4 mA at 1 MHz.
TOTAL POWER LOSSES
Total power losses are:
PLOSS = PCOND + PSWR + PSWF + PQ + PBOOST + PDIODE + PIND
Losses internal to the LM27341/LM27342 are:
PINTERNAL = PCOND + PSWR + PSWF + PQ + PBOOST
EFFICIENCY CALCULATION EXAMPLE
Operating conditions are:
VIN = 12V VOUT = 3.3V IOUT = 2A
fSW = 2 MHz VD1 = 0.5V RDCR = 20 mΩ
Internal Power Losses are:
PCOND = IOUT2 x RDSON x D
= 22 x 0.15Ω x 0.314 = 188 mW
PSW = (VIN x IOUT x fSW x tFALL)
= (12V x 2A x 2 MHz x 10ns) = 480 mW
PQ= IQ x VIN
= 2.4 mA x 12V = 29 mW
PBOOST = IBOOST x VBOOST
= 8.2 mA x 4.5V = 37 mW
________
PINTERNAL = PCOND + PSW + PQ + PBOOST = 733 mW
Total Power Losses are:
15 www.national.com
LM27341/LM27342
PDIODE = VD1 x IOUT (1 - D)
= 0.5V x 2 x (1 - 0.314) = 686 mW
PIND = IOUT2 x RDCR
= 22 x 20 mΩ= 80 mW
________
PLOSS = PINTERNAL + PDIODE + PIND = 1.499 W
The efficiency can now be estimated as:
With this information we can estimate the junction tempera-
ture of the LM27341/LM27342.
CALCULATING THE LM27341/LM27342 JUNCTION
TEMPERATURE
Thermal Definitions:
TJ = IC junction temperature
TA = Ambient temperature
RθJC = Thermal resistance from IC junction to device case
RθJA = Thermal resistance from IC junction to ambient air
30005666
FIGURE 7. Cross-Sectional View of Integrated Circuit Mounted on a Printed Circuit Board.
Heat in the LM27341/LM27342 due to internal power dissi-
pation is removed through conduction and/or convection.
Conduction: Heat transfer occurs through cross sectional
areas of material. Depending on the material, the transfer of
heat can be considered to have poor to good thermal con-
ductivity properties (insulator vs conductor).
Heat Transfer goes as:
Silicon→Lead Frame→PCB
Convection: Heat transfer is by means of airflow. This could
be from a fan or natural convection. Natural convection occurs
when air currents rise from the hot device to cooler air.
Thermal impedance is defined as:
Thermal impedance from the silicon junction to the ambient
air is defined as:
This impedance can vary depending on the thermal proper-
ties of the PCB. This includes PCB size, weight of copper
used to route traces , the ground plane, and the number of
layers within the PCB. The type and number of thermal vias
can also make a large difference in the thermal impedance.
Thermal vias are necessary in most applications. They con-
duct heat from the surface of the PCB to the ground plane.
Six to nine thermal vias should be placed under the exposed
pad to the ground plane. Placing more than nine thermal vias
results in only a small reduction to RθJA for the same copper
area. These vias should have 8 mil holes to avoid wicking
solder away from the DAP. See AN-1187 and AN-1520 for
more information on package thermal performance. If a com-
promise for cost needs to be made, the thermal vias for the
eMSOP package can range from 8-14 mils, this will increase
the possibility of solder wicking.
To predict the silicon junction temperature for a given appli-
cation, three methods can be used. The first is useful before
prototyping and the other two can more accurately predict the
junction temperature within the application.
Method 1:
The first method predicts the junction temperature by extrap-
olating a best guess RθJA from the table or graph. The tables
and graph are for natural convection. The internal dissipation
can be calculated using the efficiency calculations. This al-
lows the user to make a rough prediction of the junction
temperature in their application. Methods two and three can
later be used to determine the junction temperature more ac-
curately.
The two tables below have values of RθJA for the LLP and the
eMSOP package.
www.national.com 16
LM27341/LM27342
RθJA values for the eMSOP @ 1Watt dissipation:
Number
of Board
Layers
Size of
Bottom Layer
Copper
Connected to
DAP
Size of Top
Layer Copper
Connected to
Dap
Number
of 10 mil
Thermal
Vias
RθJA
2 0.25 in20.05 in28 80.6 °
C/W
2 0.5625 in20.05 in28 70.9 °
C/W
2 1 in20.05 in28 62.1 °
C/W
2 1.3225 in20.05 in28 54.6 °
C/W
4 (Eval
Board)
3.25 in22.25 in214 35.3 °
C/W
RθJA values for the LLP @ 1Watt dissipation:
Number
of Board
Layers
Size of
Bottom Layer
Copper
Connected to
DAP
Size of Top
Layer Copper
Connected to
Dap
Number
of 8 mil
Thermal
Vias
RθJA
2 0.25 in20.05 in28 78 °C/
W
2 0.5625 in20.05 in28 65.6 °
C/W
2 1 in20.05 in28 58.6 °
C/W
2 1.3225 in20.05 in28 50 °C/
W
4 (Eval
Board)
3.25 in22.25 in215 30.7 °
C/W
30005690
FIGURE 8. Estimate of Thermal Resistance vs. Ground
Copper Area
Eight Thermal Vias and Natural Convection
Method 2:
The second method requires the user to know the thermal
impedance of the silicon junction to case. (RθJC) is approxi-
mately 9.5°C/W for the eMSOP package or 9.1°C/W for the
LLP. The case temperature should be measured on the bot-
tom of the PCB at a thermal via directly under the DAP of the
LM27341/LM27342. The solder resist should be removed
from this area for temperature testing. The reading will be
more accurate if it is taken midway between pins 2 and 9,
where the NMOS switch is located. Knowing the internal dis-
sipation from the efficiency calculation given previously, and
the case temperature (TC) we have:
Therefore:
TJ = (RθJC x PLOSS) + TC
METHOD 2 EXAMPLE
The operating conditions are the same as the previous Effi-
ciency Calculation:
VIN = 12V VOUT = 3.3V IOUT = 2A
fSW = 2 MHz VD1 = 0.5V RDCR = 20 mΩ
Internal Power Losses are:
PCOND = IOUT2 x RDSON x D
= 22 x 0.15Ω x 0.314 = 188 mW
PSW = (VIN x IOUT x fSW x tFALL)
= (12V x 2A x 2 MHz x 10ns) = 480 mW
PQ= IQ x VIN
= 1.5 mA x 12V = 29 mW
PBOOST = IBOOST x VBOOST
= 7 mA x 4.5V = 37 mW
________
PINTERNAL = PCOND + PSW + PQ + PBOOST = 733 mW
The junction temperature can now be estimated as:
TJ = (RθJC x PINTERNAL) + TC
A National Semiconductor eMSOP evaluation board was
used to determine the TJ of the LM27341/LM27342. The four
layer PCB is constructed using FR4 with 2oz copper traces.
There is a ground plane on the internal layer directly beneath
the device, and a ground plane on the bottom layer. The
ground plane is accessed by fourteen 10 mil vias. The board
measures 2in x 2in (50.8mm x 50.8mm). It was placed in a
container with no airflow. The case temperature measured on
this LM27342MY Demo Board was 48.7°C. Therefore,
TJ = (9.5 °C/W x 733 mW) + 48.7 °C
TJ = 55.66 °C
To keep the Junction temperature below 125 °C for this lay-
out, the ambient temperature must stay below 94.33 °C.
TA_MAX = TJ_MAX - TJ +TA
TA_MAX = 125 °C - 55.66 °C + 25 °C
TA_MAX = 94.33 °C
Method 3:
The third method can also give a very accurate estimate of
silicon junction temperature. The first step is to determine
17 www.national.com
LM27341/LM27342
RθJA of the application. The LM27341/LM27342 has over-
temperature protection circuitry. When the silicon tempera-
ture reaches 165 °C, the device stops switching. The
protection circuitry has a hysteresis of 15 °C. Once the silicon
temperature has decreased to approximately 150 °C, the de-
vice will start to switch again. Knowing this, the RθJA for any
PCB can be characterized during the early stages of the de-
sign by raising the ambient temperature in the given applica-
tion until the circuit enters thermal shutdown. If the SW-pin is
monitored, it will be obvious when the internal NFET stops
switching indicating a junction temperature of 165 °C. We can
calculate the internal power dissipation from the above meth-
ods. All that is needed for calculation is the estimate of
RDSON at 165 °C. This can be extracted from the graph of
RDSON vs. Temperature. The value is approximately 0.267
ohms. With this, the junction temperature, and the ambient
temperature RθJA can be determined.
Once this is determined, the maximum ambient temperature
allowed for a desired junction temperature can be found.
METHOD 3 EXAMPLE
The operating conditions are the same as the previous Effi-
ciency Calculation:
VIN = 12V VOUT = 3.3V IOUT = 2A
fSW = 2 MHz VD1 = 0.5V RDCR = 20 mΩ
Internal Power Losses are:
PCOND = IOUT2 x RDSON x D
= 22 x 0.267Ω x .314 = 335 mW
PSW = (VIN x IOUT x fSW x tFALL)
= (12V x 2A x 2 MHz x 10nS) = 480 mW
PQ= IQ x VIN
= 1.5 mA x 12V = 29 mW
PBOOST = IBOOST x VBOOST
= 7 mA x 4.5V = 37 mW
________
PINTERNAL = PCOND + PSW + PQ + PBOOST = 881 mW
Using a National Semiconductor eMSOP evaluation board to
determine the RθJA of the board. The four layer PCB is con-
structed using FR4 with 2oz copper traces. There is a ground
plane on the internal layer directly beneath the device, and a
ground plane on the bottom layer. The ground plane is ac-
cessed by fourteen 10 mil vias. The board measures 2in x 2in
(50.8mm x 50.8mm). It was placed in an oven with no forced
airflow.
The ambient temperature was raised to 132 °C, and at that
temperature, the device went into thermal shutdown. RθJA can
now be calculated.
To keep the Junction temperature below 125 °C for this lay-
out, the ambient temperature must stay below 92 °C.
TA_MAX = TJ_MAX - (RθJA x PINTERNAL)
TA_MAX = 125 °C - (37.46 °C/W x 0.881 W)
TA_MAX = 92 °C
This calculation of the maximum ambient temperature is only
2.3 °C different from the calculation using method 2. The
methods described above to find the junction temperature in
the eMSOP package can also be used to calculate the junc-
tion temperature in the LLP package. The 10 pin LLP package
has a RθJC = 9.1°C/W, while RθJA can vary depending on the
layout. RθJA can be calculated in the same manner as de-
scribed in method 3.
PCB Layout Considerations
COMPACT LAYOUT
The performance of any switching converter depends as
much upon the layout of the PCB as the component selection.
The following guidelines will help the user design a circuit with
maximum rejection of outside EMI and minimum generation
of unwanted EMI.
Parasitic inductance can be reduced by keeping the power
path components close together and keeping the area of the
loops small, on which high currents travel. Short, thick traces
or copper pours (shapes) are best. In particular, the switch
node (where L1, D1, and the SW pin connect) should be just
large enough to connect all three components without exces-
sive heating from the current it carries. The LM27341/
LM27342 operates in two distinct cycles (see Figure 2) whose
high current paths are shown below in Figure 9:
30005660
FIGURE 9. Buck Converter Current Loops
www.national.com 18
LM27341/LM27342
The dark grey, inner loop represents the high current path
during the MOSFET on-time. The light grey, outer loop rep-
resents the high current path during the off-time.
GROUND PLANE AND SHAPE ROUTING
The diagram of Figure 9 is also useful for analyzing the flow
of continuous current vs. the flow of pulsating currents. The
circuit paths with current flow during both the on-time and off-
time are considered to be continuous current, while those that
carry current during the on-time or off-time only are pulsating
currents. Preference in routing should be given to the pulsat-
ing current paths, as these are the portions of the circuit most
likely to emit EMI. The ground plane of a PCB is a conductor
and return path, and it is susceptible to noise injection just like
any other circuit path. The path between the input source and
the input capacitor and the path between the catch diode and
the load are examples of continuous current paths. In con-
trast, the path between the catch diode and the input capacitor
carries a large pulsating current. This path should be routed
with a short, thick shape, preferably on the component side
of the PCB. Multiple vias in parallel should be used right at
the pad of the input capacitor to connect the component side
shapes to the ground plane. A second pulsating current loop
that is often ignored is the gate drive loop formed by the SW
and BOOST pins and boost capacitor CBOOST. To minimize
this loop and the EMI it generates, keep CBOOST close to the
SW and BOOST pins.
FB LOOP
The FB pin is a high-impedance input, and the loop created
by R2, the FB pin and ground should be made as small as
possible to maximize noise rejection. R2 should therefore be
placed as close as possible to the FB and GND pins of the IC.
PCB SUMMARY
1. Minimize the parasitic inductance by keeping the power
path components close together and keeping the area of
the high-current loops small.
2. The most important consideration when completing the
layout is the close coupling of the GND connections of
the CIN capacitor and the catch diode D1. These ground
connections should be immediately adjacent, with
multiple vias in parallel at the pad of the input capacitor
connected to GND. Place CIN and D1 as close to the IC
as possible.
3. Next in importance is the location of the GND connection
of the COUT capacitor, which should be near the GND
connections of CIN and D1.
4. There should be a continuous ground plane on the
copper layer directly beneath the converter. This will
reduce parasitic inductance and EMI.
5. The FB pin is a high impedance node and care should
be taken to make the FB trace short to avoid noise pickup
and inaccurate regulation. The feedback resistors should
be placed as close as possible to the IC, with the GND
of R2 placed as close as possible to the GND of the IC.
The VOUT trace to R1 should be routed away from the
inductor and any other traces that are switching.
6. High AC currents flow through the VIN, SW and VOUT
traces, so they should be as short and wide as possible.
However, making the traces wide increases radiated
noise, so the layout designer must make this trade-off.
Radiated noise can be decreased by choosing a shielded
inductor.
The remaining components should also be placed as close
as possible to the IC. Please see Application Note AN-1229
for further considerations and the LM27342 demo board as
an example of a four-layer layout.
19 www.national.com
LM27341/LM27342
LM27341/LM27342 Circuit Examples
30005615
FIGURE 10. VIN = 7 - 16V, VOUT = 5V, fSW = 2 MHz, IOUT = Full Load
30005677
LM27342 Efficiency vs. Load Current
300056100
Transient Response
IOUT = 100 mA - 2A @ slewrate = 2A / µs
Bill of Materials for Figure 10
Part Name Part ID Part Value Part Number Manufacturer
Buck Regulator U1 1.5 or 2A Buck Regulator LM27341 / LM27342 National Semiconductor
CPVIN C1 10 µF GRM32DR71E106KA12L Murata
CBOOST C2 0.1 µF GRM188R71C104KA01D Murata
COUT C3 22 µF C3225X7R1C226K TDK
COUT C4 22 µF C3225X7R1C226K TDK
CFF C5 0.18 µF 0603ZC184KAT2A AVX
Catch Diode D1 Schottky Diode Vf = 0.32V CMS06 Toshiba
Inductor L1 2.2 µH CDRHD5D28RHPNP Sumida
Feedback Resistor R1 560Ω CRCW0603560RFKEA Vishay
Feedback Resistor R2 140Ω CRCW0603140RFKEA Vishay
www.national.com 20
LM27341/LM27342
30005673
FIGURE 11. VIN = 7 - 16V, VOUT = 5V, fSW = 1 MHz, IOUT = Full Load
30005679
LM27342 Efficiency vs. Load Current
300056101
Transient Response
IOUT = 100 mA - 2A @ slewrate = 2A / µs
Bill of Materials for Figure 11
Part Name Part ID Part Value Part Number Manufacturer
Buck Regulator U1 1.5 or 2A Buck Regulator LM27341 / LM27342 National Semiconductor
CPVIN C1 10 µF GRM32DR71E106KA12L Murata
CBOOST C2 0.1 µF GRM188R71C104KA01D Murata
COUT C3 47 µF GRM32ER61A476KE20L Murata
COUT C4 22 µF C3225X7R1C226K TDK
CFF C5 0. 27 µF C0603C274K4RACTU Kemet
Catch Diode D1 Schottky Diode Vf = 0.32V CMS06 Toshiba
Inductor L1 3.3 µH CDRH6D26HPNP Sumida
Feedback Resistor R1 560Ω CRCW0603560RFKEA Vishay
Feedback Resistor R2 140Ω CRCW0603140RFKEA Vishay
21 www.national.com
LM27341/LM27342
30005615
FIGURE 12. VIN = 5 - 16V, VOUT = 3.3V, fSW = 2 MHz, IOUT = Full Load
30005681
LM27342 Efficiency vs. Load Current
300056102
Transient Response
IOUT = 100 mA - 2A @ slewrate = 2A / µs
Bill of Materials for Figure 12
Part Name Part ID Part Value Part Number Manufacturer
Buck Regulator U1 1.5 or 2A Buck Regulator LM27341 / LM27342 National Semiconductor
CPVIN C1 10 µF GRM32DR71E106KA12L Murata
CBOOST C2 0.1 µF GRM188R71C104KA01D Murata
COUT C3 22 µF C3225X7R1C226K TDK
COUT C4 22 µF C3225X7R1C226K TDK
CFF C5 0.18 µF 0603ZC184KAT2A AVX
Catch Diode D1 Schottky Diode Vf = 0.32V CMS06 Toshiba
Inductor L1 1.5 µH CDRH5D18BHPNP Sumida
Feedback Resistor R1 430 Ω CRCW0603430RFKEA Vishay
Feedback Resistor R2 187 Ω CRCW0603187RFKEA Vishay
www.national.com 22
LM27341/LM27342
30005614
FIGURE 13. VIN = 5 - 16V, VOUT = 3.3V, fSW = 2 MHz, IOUT = Full Load
30005681
LM27342 Efficiency vs. Load Current
300056103
Transient Response
IOUT = 100 mA - 2A @ slewrate = 2A / µs
Bill of Materials for Figure 13
Part Name Part ID Part Value Part Number Manufacturer
Buck Regulator U1 1.5 or 2A Buck Regulator LM27341 / LM27342 National Semiconductor
CPVIN C1 10 µF GRM32DR71E106KA12L Murata
CBOOST C2 0.1 µF GRM188R71C104KA01D Murata
COUT C3 22 µF C3225X7R1C226K TDK
COUT C4 22 µF C3225X7R1C226K TDK
Catch Diode D1 Schottky Diode Vf = 0.32V CMS06 Toshiba
Inductor L1 1.5 µH CDRH5D18BHPNP Sumida
Feedback Resistor R1 430 Ω CRCW0603430RFKEA Vishay
Feedback Resistor R2 187 Ω CRCW0603187RFKEA Vishay
23 www.national.com
LM27341/LM27342
30005673
FIGURE 14. VIN = 5 - 16V, VOUT = 3.3V, fSW = 1 MHz, IOUT = Full Load
30005683
LM27342 Efficiency vs. Load Current
300056104
Transient Response
IOUT = 100 mA - 2A @ slewrate = 2A / µs
Bill of Materials for Figure 14
Part Name Part ID Part Value Part Number Manufacturer
Buck Regulator U1 1.5 or 2A Buck Regulator LM27341 / LM27342 National Semiconductor
CPVIN C1 10 µF GRM32DR71E106KA12L Murata
CBOOST C2 0.1 µF GRM188R71C104KA01D Murata
COUT C3 47 µF GRM32ER61A476KE20L Murata
COUT C4 22 µF C3225X7R1C226K TDK
CFF C5 0.27 µF C0603C274K4RACTU Kemet
Catch Diode D1 Schottky Diode Vf = 0.32V CMS06 Toshiba
Inductor L1 2.7 µH CDRH5D18BHPNP Sumida
Feedback Resistor R1 430 Ω CRCW0603430RFKEA Vishay
Feedback Resistor R2 187 Ω CRCW0603187RFKEA Vishay
www.national.com 24
LM27341/LM27342
30005614
FIGURE 15. VIN = 3.3 - 16V, VOUT = 1.8V, fSW = 2 MHz, IOUT = Full Load
30005685
LM27342 Efficiency vs. Load Current
300056105
Transient Response
IOUT = 100 mA - 2A @ slewrate = 2A / µs
Bill of Materials for Figure 15
Part Name Part ID Part Value Part Number Manufacturer
Buck Regulator U1 1.5 or 2A Buck Regulator LM27341 / LM27342 National Semiconductor
CPVIN C1 10 µF GRM32DR71E106KA12L Murata
CBOOST C2 0.1 µF GRM188R71C104KA01D Murata
COUT C3 22 µF C3225X7R1C226K TDK
COUT C4 22 µF C3225X7R1C226K TDK
Catch Diode D1 Schottky Diode Vf = 0.32V CMS06 Toshiba
Inductor L1 1.0 µH CDRH5D18BHPNP Sumida
Feedback Resistor R1 12 kΩCRCW060312K0FKEA Vishay
Feedback Resistor R2 15 kΩCRCW060315K0FKEA Vishay
25 www.national.com
LM27341/LM27342
30005673
FIGURE 16. VIN = 3.3 - 16V, VOUT = 1.8V, fSW = 1 MHz, IOUT = Full Load
30005687
LM27342 Efficiency vs. Load Current
300056106
Transient Response
IOUT = 100 mA - 2A @ slewrate = 2A / µs
Bill of Materials for Figure 16
Part Name Part ID Part Value Part Number Manufacturer
Buck Regulator U1 1.5 or 2A Buck Regulator LM27341 / LM27342 National Semiconductor
CPVIN C1 10 µF GRM32DR71E106KA12L Murata
CBOOST C2 0.1 µF GRM188R71C104KA01D Murata
COUT C3 22 uF C3225X7R1C226K TDK
COUT C4 22 uF C3225X7R1C226K TDK
CFF C5 3.9 nF GRM188R71H392KA01D Murata
Catch Diode D1 Schottky Diode Vf = 0.32V CMS06 Toshiba
Inductor L1 1.8 µH CDRH5D18BHPNP Sumida
Feedback Resistor R1 12 kΩCRCW060312K0FKEA Vishay
Feedback Resistor R2 15 kΩCRCW060315K0FKEA Vishay
www.national.com 26
LM27341/LM27342
30005615
FIGURE 17. VIN = 3.3 - 9V, VOUT = 1.2V, fSW = 2 MHz, IOUT = Full Load
30005689
LM27342 Efficiency vs. Load Current
300056107
Transient Response
IOUT = 100 mA - 2A @ slewrate = 2A / µs
Bill of Materials for Figure 17
Part Name Part ID Part Value Part Number Manufacturer
Buck Regulator U1 1.5 or 2A Buck Regulator LM27341 / LM27342 National Semiconductor
CPVIN C1 10 µF GRM32DR71E106KA12L Murata
CBOOST C2 0.1 µF GRM188R71C104KA01D Murata
COUT C3 47 µF GRM32ER61A476KE20L Murata
COUT C4 22 µF C3225X7R1C226K TDK
CFF C5 NOT MOUNTED
Catch Diode D1 Schottky Diode Vf = 0.32V CMS06 Toshiba
Inductor L1 0.56 µH CDRH2D18/HPNP Sumida
Feedback Resistor R1 1.02 kΩCRCW06031K02FKEA Vishay
Feedback Resistor R2 5.10 kΩCRCW06035K10FKEA Vishay
27 www.national.com
LM27341/LM27342
Physical Dimensions inches (millimeters) unless otherwise noted
10-Lead LLP Package
NS Package Number SDA10A
10-Lead eMSOP Package
NS Package Number MUC10A
www.national.com 28
LM27341/LM27342
Notes
29 www.national.com
LM27341/LM27342
Notes
LM27341/LM27342/LM27341Q/LM27342Q 2 MHz 1.5/2A Wide Input Range Step-Down DC-DC
Regulator with Frequency Synchronization
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