IM1243 - Innovative Microdevices, Inc.

FEATURES

•Real time clock keeps tracks of hundredths of

seconds, minutes, hours, days, date of the

months, and years.

•Watch function is transparent to RAM operation.

• Data Retention over 10 years in absence of power.

• 8Kx 8 NV SRAM directly replace volatile static

RAM or EEPROM.

• Embedded lithium energy cell maintains calendar

operation and retains RAM data.

• Standard 28 pin DIP JEDEC Pinout.

• Month and year determine the number of days in

each month

• Full +10% operating range.

• Operating temperature range 0oC to 70oC.

• Available in 120 ns access time.

Pin configuration

1 28

2 27

3 26

4 25

5 24

6 23

7 22

8 21

9 20

10 19

11 18

12 17

13 16

14 15

RST VCC

A12 WE

A7 NC

A6 A8

A5 A9

A4 A11

A3 OE

A2 A10

A1 CE

A0 I/O7

I/O0 I/O6

I/O1 I/O5

I/O2 I/O4

Gnd I/O3

PIN NAMES

NC No Connection

OE Output Enable

Gnd Ground

I/O0 – I/O7 Data in/ Data Out

Vcc Power Supply +5V

WE Write Enable

A0 – A12 Address Inputs

CE Chip Enable

RST Reset

Functional Description

The IM 1243Y 64K NV SRAM with Phantom Clock

is a fully static nonvolatile RAM organized as 8192

words by 8 bits with a built-in real time clock.

This ‘NV SRAM’ has all the normal char-

acteristics of a CMOS static RAM with an important

benefit of data being retained in the absence of power .

Data retention current is so small that a miniature

lithium cell contained within the package provides an

energy source to preserve data. Protection against

data loss has also been incorporated to maintain data

integrity during power on/off conditions.

The Phantom Clock provides timekeeping

information including hundredths of seconds, seconds,

minutes, hours, day, date, month and year

information. The date at the end of the month is au-

tomatically adjusted for months with less than 31 days,

including correction for leap years. The Phantom Clock

operates in either 24-hour or 12-hour format with an

AM/PM indicator.

INNOVATIVE MICROTECHNOLOGY INC.Phone/Fax-440-322-8083.Website:www.innovativemicrotechnology.com

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

Parameter Symbol Min. Typ Max. Unit

Supply Vcc 4.5 5.0 5.5 V

Voltage Gnd 0 - 0 V

Input Voltage VIH 2.2 3.5 Vcc

+0.3 V

VIL 0 - 0.8 V

Recommended D.C. Operating Conditions

Maximum Ratings

Operating Temperature….0oC to 70oC

Storage Temperature…….0oC to 70oC

Soldering Temperature

And Time………………….260oC for 10 sec

Supply Voltage…………….-0.5V to 7.0V

Input Voltage………………-0.5V to 7.0V

Input/ Output Voltage…….-0.5V to

Vcc + 0.3V

Power Dissipation…………1.0W

WRITE MODE

The IM1243Y is in the write mode whenever

CE and WE inputs are held low. The latter occurring

falling edge of either CE or WE determines the start of

a write cycle. A write is terminated by the earlier rising

edge of CE or WE. The address must be held valid

throughout the write cycle. WE must return to the high

state for a minimum recovery time (tWR) before another

Read or Write cycle can be initiated. CE or WE is high

during power on to perfect memory after Vcc reaches

Vcc (min) but before the processor stabilizes.

DATA RETENTION

The IM1243Y provides full functional

capability for Vcc greater than 4.5V and write protects

at 4.5V. Data is retained in the absence of Vcc without

any additional support circuitry. The SRAM constantly

monitors Vcc. The moment Vcc decays, the RAM au-

tomatically write protects itself. All inputs to the RAM

become “don’t care” and all outputs are in high imped-

ance-state. As Vcc falls below approximately 3.0V the

power switching circuit connects the lithium energy

source to RAM to retain data. During power-on, when

Vcc rises above approximately 3.0V the power switch-

ing circuit connects external Vcc to the RAM and dis-

connects the lithium energy source. Normal RAM op-

eration can resume after Vcc becomes greater than

4.5V.

READ MODE

The IM 1243Y performs a read cycle whenever WE

high and CE low. The unique address specified by the

13 address inputs A0-A12 defines which of the 8,192

bytes of data is to be accessed. Valid data will be

available to the eight data output drivers within access

time tACC after the last address input is stable, provided

that CE and OE access times are satisfied. If OE and

CE access times are not satisfied, data access will be

measured from the limiting parameter (tCO or tOE), rather

than address. The state of the eight data I/O lines is

controlled by the OE and CE control signals. The data

lines may be in an indeterminate state between tOH and

tAA but the data lines will always have valid data at tAA.

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

PHANTOM CLOCK REGISTER INFORMATION

The Phantom Clock information is contained

in 8 registers of 8 bits, each of which is sequentially

accessed one bit at a time after the 64-bit pattern rec-

ognition sequence has been completed. When updat-

ing the Phantom Clock registers, each register must

be handled in - groups of 8 bits. Writing and reading

individual bits within a register could produce errone-

ous results.

Data contained in the Phantom Clock register is in bi-

nary coded decimal format (BCD). Reading and writ-

ing the registers is always accomplished by stepping

through all 8 registers, starting with bit 0 of register 0

and ending with bit 7 of register 7.

PHANTOM CLOCK OPEARTION

Communication with the Phantom Clock is es-

tablished by pattern recognition on a serial bit stream

of 64 bits which must be matched by executing 64 con-

secutive write cycles containing the proper data on I/

O0. All access which occur prior to recognition of the

64-bit pattern are directed to memory.

After recognition is established, the next 64

read or write cycles either extract or update data in the

Phantom Clock, and memory access is inhibited.

Initially, a read cycle to any memory location

using the CE and OE control of the Phantom Clock

starts the pattern recognition sequence by moving a

pointer to the first bit of the 64-bit comparison register.

Next, 64 consecutive write cycles are executed using

the CE and WE control of the SmartWatch. These 64

write cycles are used only to gain access to the Phan-

tom Clock.

However, write cycle generated to gain access to the

Phantom Cycle are also writing data to a location in the

mated RAM. When the first write cycle is executed it is

compared to bit 0 of the 64-bit comparison register, If a

match is found, the pointer increments to the next loca-

tion of the comparison register and awaits the next write

cycle. If a match is not found the pointer does not ad-

vance and all subsequent write cycles are ignored. If a

read cycle occurs at any time during pattern recogni-

tion, the present sequence is aborted and the compari-

son register have been matched. With a correct match

for 64-bits the Phantom Clock is enabled and data trans-

fer to or from the timekeeping register can proceed.

The next 64-cycles will cause the Phantom Clock to

either receive or transmit data on I/O0, depending the

level of the OE pin or the WE.

AM/PM 12/24 MODE

Bit 7of the hours register is defined as the 12-or-

24 hour mode selectbit. When high, the 12-hour mode

is selected. In the 12-hour mode, bit 5 is the AM/PM

bit with logic high being PM. In the 24-hour mode, bit 5

is the second 10-hour bit(20-23 hours).

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

HEX

VALUE

1 1 0 0 0 1 0 1

0 0 1 1 1 0 1 0

1 0 1 0 0 0 1 1

0 1 0 1 1 1 0 0

1 1 0 0 0 1 0 1

0 0 1 1 1 0 1 0

1 1 0 0 0 1 0 1

0 1 0 1 1 1 0 0

PHANTOM CLOCK REGISTER DEFINTION

BYTE 0

BYTE 2

BYTE 3

BYTE 6

BYTE 5

BYTE 4

BYTE 7

BYTE 1

C5

3A

A3

5C

C5

3A

A3

5C

7 6 5 4 3 2 1 0

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

OSCILATTOR AND RESET BITS

Bits 4 and 5 of the day register are used to control the RESET and oscillator functions. Bit 4 controls

the RESET (pin 1). When the RESET bit is set to logic 1, the RESET input pin is ignored. When the RESET

bit is set to logic0, A low input on the RESET pin will cause the Phantom Clock to abort data transfer without

changing data in the watch registers. Bit 5 controls the oscillator. When set to logic 1, the oscillator is off.

When set to logic 0, the oscillator turns on and the watch becomes operational. These bits are shipped from

the factory set to a logic 1.

PHANTOM CLOCK REGISTER DEFINTION

0

1

2

3

4

5

6

7

REGISTER RANGE

(BCD)

00-99

00-59

01-12

00-23

01-07

01-13

01-12

00-99

0.1 SEC 0.01 SEC

10 SEC

0SECONDS

MINUTES

HOUR

DAY

DATE

MONTH

YEAR

10YEAR

0

00

0

10 DATE

10

MONTH

10 MIN

12/24 10 A/P HR

OSC RST

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

Notes 1. Typical values are measured at Ta = 25 OC and Vcc = 5V

Capacitance

Parameter Description Test conditons Min. Typ Max Unit

CIInput capacitance Vi =0V - 5 10 pF

CI/O I/O capacitance VIO = 0V - 5 10 pF

DC ELECTRICAL CHARACTERISTICS (00C TO 700C; Vcc = 5V + 10%)

PARAMETER SYMBOL MIN TYP MAX UNITS

Input Leakage Current IIL -1.0 +1.0 A

I/O Leakage Current IIO -1.0 +1.0 A

CE > VIH < Vcc

Output Current @ 2.4V IOH -1.0 mA

Output Current @ 0.4V IOL 2.0 mA

Standby Current CE = 2.25V ICCS1 5.0 10 mA

Standby Current CE = Vcc- 0.5V ICCS2 3.0 5.0 mA

Operating Current tCYC = 120ns ICC01 85 mA

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

Switching Characteristics over the operating range

Parameter Description Min Max Unit

tRC Read cycle time 120 ns

tACC Address access time 120 ns

tOE Output enable access time 60 ns

tCO CE to output valid 120 ns

tCOE OE or CE to output valid 5 ns

tOD Output High Z from Deselection 40 ns

tOH Output hold from adds change 5 ns

tWC Write cycle time 120 ns

tAW Address setup time 0 ns

tWP Write pulse-width 90 ns

tWR Write recovery time 20 ns

tODW Output High Z from WE 40 ns

tOEW Output Active from WE 5 ns

tDS Input data setup time 50 ns

tDH Input data hold time 20 ns

PARAMETER SYMBOL MIN TYP MAX UNITS

CE at VIH before power-down tPD 0

u

s

Vcc Slow from 4.5 V to 0V tF 300 us

(CE at VIH)

Vcc Slow from 0V to 4.5 V tR 0 us

(CE at VIH)

CE at VIH after Power-Up tREC 2 ms

POWER DOWN/POWER UP TIMING

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

PARAMETER SYMBOL MIN TYP MAX UNITS

Read Cycle Time tRC 120 ns

CE Access Time tCO 100 ns

OE Access Time tOE 100 ns

CE to Output Low Z tCOE 10 ns

OE to Output Low Z tOEE 10 ns

CE to Output High Z tOD 40 ns

OE to Output High Z tODO 40 ns

Read Recovery tRR 20 ns

Write Cycle Time tWC 120 ns

Write Pulse Width tWP 100 ns

Write Recovery tWR 20 ns

Data Setup Time tDS 40 ns

Data Hold Time tDH 10 ns

CE Pulse Width tCW 100 ns

RESET Pulse Width tRST 200 ns

CE High to Power-Fail tPF 0 ns

PHANTOM CLOCK AC ELECTRICAL CHARACTERISTICS(00C TO 700C,Vcc= 4.5 TO 5.5V)

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

VIL

VIH VIH

VIH

VIL VIL

tAW

tWP tWR1

tODW tOEW

High

Impedance

DOUT

WRITE CYCLE 1

tDS tDH1

VIL

VIH

VIH Data In

Stable

DIN

CE

WE

VIH VIH

VIH VIL

VIH

VIH VIL

VIH

tCOE

tCOF

tOD

VOL

VOH

VOL

DOUT OUTPUT

DATA VALID

VIL VIL

CE

OE

READ CYCLE

ADDRESSES tRC

tACC

tCO

tOH

tWC

ADDRESSES VIL

VIH

RESET FOR PHATOM CLOCK

tRST

RST

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

VIH

VIL VIL

VIH

VIL VIL

tODW

tCOE

tDS tDH

VIL

VIH

VIH Data In

Stable

DIN

VIL VIL

VIH VIH

tAW tWP

tWR

DOUT

WE

CE

ADDRESSES

WRITE CYCLE 2

tCOE

tOEE

tOE

tCO

tODO

tRR

tOD

Output Data Valid

CE

OE

Q

Read cycle to Phantom Clock

tWC

VIH

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

Write Cycle to Phantom Clock

tWR

tWP

tWC

tWR

tCW

tDH

tDS

Data IN Stable

D

CE

WE

OE=VIH

4.75V —————————————————————————————————————————————————

tF tR

3.2V ——————————————————————————————————————————————————

tPD tREC

LI Cell

Leakage Current Data Retention Time

tDR

FIG. D POWER – DOWN/ POWER –UP CONDITION

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock

J

H

A

F

K

DIM IN INCHES MIN. MAX.

A 1.52 1.54

B 0.695 0.72

C 0.395 0.415

D 0.1 0.13

F 0.12 0.16

G 0.09 0.11

H 0.59 0.63

J 0.008 0.012

B

INNOVATIVE

IM 1243Y

Serial RTC + SRAM

mm - yy

Ordering Information

Ordering Code Package Type

IM1243 32-Pin SIP

G

K 0.015 0.021

D

C

INNOVATIVE IM1243

64K NV SRAM with Phantom Clock