PD- 92006A IRF830AS/L SMPS MOSFET HEXFET(R) Power MOSFET Applications Switch Mode Power Supply (SMPS) l Uninterruptable Power Supply l High Speed Power Switching l Benefits Low Gate Charge Qg Results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss specified (See AN 1001) VDSS RDS(on) max ID 1.40 5.0A 500V l D2Pak TO-262 Absolute Maximum Ratings ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds 5.0 3.2 20 3.1 74 0.59 30 5.3 -55 to + 150 Units A W W/C V V/ns C 300 (1.6mm from case ) Typical SMPS Topologies: l l Two Transistor Forward Half Bridge and Full Bridge Notes through are on page 10 5/4/00 Document Number: 90093 www.vishay.com 1 IRF830AS/L Static @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 500 --- --- 2.0 --- --- --- --- Typ. --- 0.60 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 1.4 VGS = 10V, ID = 3.0A 4.5 V VDS = VGS, ID = 250A 25 VDS = 500V, VGS = 0V A 250 VDS = 400V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 2.8 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 10 21 21 15 620 93 4.3 886 27 39 Max. Units Conditions --- S VDS = 50V, ID = 3.0A 24 ID = 5.0A 6.3 nC VDS = 400V 11 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 5.0A ns --- RG = 14 --- RD = 49,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units --- --- --- 230 5.0 7.4 mJ A mJ Typ. Max. Units --- --- 1.7 40 C/W Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted, steady-state)* Diode Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Document Number: 90093 Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 5.0 showing the A G integral reverse --- --- 20 S p-n junction diode. --- --- 1.5 V TJ = 25C, IS = 5.0A, VGS = 0V --- 430 650 ns TJ = 25C, IF = 5.0A --- 2.0 3.0 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.vishay.com 2 IRF830AS/L 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 1 4.5V 0.1 20s PULSE WIDTH TJ = 25 C 0.01 0.1 1 10 10 1 4.5V 20s PULSE WIDTH TJ = 150 C 0.1 1 100 Fig 1. Typical Output Characteristics RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 2.5 10 TJ = 150 C TJ = 25 C 1 V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics Document Number: 90093 100 Fig 2. Typical Output Characteristics 100 0.1 4.0 10 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 8.0 ID = 5.0A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( C) Fig 4. Normalized On-Resistance Vs. Temperature www.vishay.com 3 IRF830AS/L V GS = C iss = C rs s = C oss = 20 0V, f = 1M Hz Cg s + C g d , Cd s SHO RTE D C gd Cds + C gd VGS , Gate-to-Source Voltage (V) C, Capacitance (pF) 10000 1000 C iss 100 C oss 10 C rss 1 10 100 VDS = 400V VDS = 250V VDS = 100V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 A 1 ID = 5.0A 0 1000 4 8 12 16 20 24 Q G , Total Gate Charge (nC) V D S , D ra in-to-S ource V oltage (V) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 100 I D , Drain Current (A) ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 10 TJ = 150 C 1 TJ = 25 C 0.1 0.2 0.6 0.8 1.0 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Document Number: 90093 100us 1ms 1 10ms V GS = 0 V 0.4 10us 10 1.2 0.1 TC = 25 C TJ = 150 C Single Pulse 10 100 1000 10000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.vishay.com 4 IRF830AS/L 5.0 RD VDS VGS I D , Drain Current (A) 4.0 D.U.T. RG + -VDD 3.0 10V Pulse Width 1 s Duty Factor 0.1 % 2.0 Fig 10a. Switching Time Test Circuit 1.0 VDS 90% 0.0 25 50 75 100 TC , Case Temperature 125 150 ( C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 P DM 0.1 0.05 t1 0.02 0.01 t2 SINGLE PULSE (THERMAL RESPONSE) 0.01 0.00001 0.0001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 90093 www.vishay.com 5 IRF830AS/L 500 D R IV E R L VDS D .U .T RG + V - DD IA S 20V 0 .0 1 tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp A EAS , Single Pulse Avalanche Energy (mJ) 1 5V TOP 400 BOTTOM ID 2.2A 3.2A 5.0A 300 200 100 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( C) IAS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V 790 QGD VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50K 12V .2F .3F D.U.T. V D S a v , A valanche V oltage (V ) QGS 785 780 775 + V - DS 770 A 0.0 VGS 2.0 3.0 4.0 5.0 I a v , A v alanc he C urrent (A ) 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Document Number: 90093 1.0 Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current www.vishay.com 6 IRF830AS/L Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + * * * * RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. D= Period + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFET Document Number: 90093 www.vishay.com 7 IRF830AS/L D2Pak Package Outline 1 0.54 (.415 ) 1 0.29 (.405 ) 1.4 0 (.055 ) M AX. -A- 1.3 2 (.05 2) 1.2 2 (.04 8) 2 1.7 8 (.07 0) 1.2 7 (.05 0) 1 10 .1 6 (.4 00 ) R E F. -B- 4 .6 9 (.18 5) 4 .2 0 (.16 5) 6.47 (.2 55 ) 6.18 (.2 43 ) 3 1 5.49 (.6 10) 1 4.73 (.5 80) 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 5.28 (.2 08 ) 4.78 (.1 88 ) 3X 1.40 (.0 55) 1.14 (.0 45) 0.55 (.0 22) 0.46 (.0 18) 0.9 3 (.0 37 ) 3X 0.6 9 (.0 27 ) 5 .08 (.20 0) 0.25 (.0 10 ) M 8.8 9 (.3 50 ) R E F. 1.3 9 (.0 55 ) 1.1 4 (.0 45 ) B A M M IN IM U M R EC O M M E ND E D F O O TP R IN T 1 1.43 (.4 50 ) NO TE S: 1 D IM EN S IO N S A FTER SO LD E R D IP . 2 D IM EN S IO N IN G & TO LE R AN C IN G P ER AN S I Y1 4.5M , 19 82 . 3 C O N TRO L LIN G D IM EN S IO N : IN C H. 4 H E ATSINK & L EA D D IM E N SIO N S DO N O T IN C LU D E B U R RS . LE AD AS SIG N M E N TS 1 - G ATE 2 - D RA IN 3 - SO U R C E 8 .89 (.35 0) 17 .78 (.70 0) 3.81 (.1 5 0) 2.0 8 (.08 2) 2X 2.5 4 (.100 ) 2X Part Marking Information D2Pak IN TE R N A TIO N A L R E C T IF IE R LO G O A S S E M B LY LO T C O D E Document Number: 90093 A PART NUM BER F530S 9 24 6 9B 1M DATE CODE (Y YW W ) YY = Y E A R W W = W EEK www.vishay.com 8 IRF830AS/L Package Outline TO-262 Outline Part Marking Information TO-262 Document Number: 90093 www.vishay.com 9 IRF830AS/L Tape & Reel Information D2Pak TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .1 6 1 ) 3 .9 0 ( .1 5 3 ) F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 1 1.6 0 (.4 57 ) 1 1.4 0 (.4 49 ) 1 .6 5 ( .0 6 5 ) 0.3 6 8 (.01 4 5 ) 0.3 4 2 (.01 3 5 ) 1 5 .42 (.60 9 ) 1 5 .22 (.60 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TRL 1 0.9 0 (.4 2 9) 1 0.7 0 (.4 2 1) 1 .75 (.06 9 ) 1 .25 (.04 9 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8) 16 .1 0 (.63 4 ) 15 .9 0 (.62 6 ) F E E D D IR E C T IO N 13.50 (.532 ) 12.80 (.504 ) 2 7.4 0 (1.079 ) 2 3.9 0 (.9 41) 4 3 30 .00 ( 14.1 73 ) MAX. Notes: N O TE S : 1 . CO M F OR M S TO E IA -418 . 2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER . 3 . DIM E NS IO N M EA S UR E D @ H U B. 4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E. Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 18mH RG = 25, IAS = 5.0A. (See Figure 12) ISD 5.0A, di/dt 370A/s, VDD V(BR)DSS, TJ 150C 6 0.0 0 (2.36 2) M IN . 26 .40 (1 .03 9) 24 .40 (.9 61 ) 3 30.4 0 (1.19 7) M A X. 4 Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS Uses IRF830A data and test conditions * When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 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Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936 Data and specifications subject to change without notice. 5/00 Document Number: 90093 www.vishay.com 10 Legal Disclaimer Notice Vishay Notice The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of International Rectifier's Power Control Systems (PCS) business, which closed in April 2007. Specifications of the products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below. Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. 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Document Number: 99901 Revision: 12-Mar-07 www.vishay.com 1