LTC3537
1
3537fd
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
2.2 MHz, 600mA
Synchronous Step-Up DC/DC
Converter and 100mA LDO
The LTC
®
3537 combines a high effi ciency, 2.2MHz step-up
DC/DC converter with an independent 100mA low dropout
regulator (LDO). The step-up converter starts from an input
voltage as low as 0.68V and contains an internal 0.4Ω
switch and a 0.6Ω synchronous rectifi er that disconnects
from the output when disabled in shutdown.
A switching frequency of 2.2MHz minimizes solution
footprint by allowing the use of tiny, low profi le inductors
and ceramic capacitors. The current mode PWM design
is internally compensated, reducing external parts count.
Fixed frequency switching is maintained until a light load
current is sensed, at which point Burst Mode
®
operation is
engaged to maximize effi ciency. For low noise operation,
Burst Mode Operation can be disabled. Anti-ring circuitry
reduces EMI by damping the inductor in discontinuous
mode. Additional features include a low shutdown current
of under 1µA and thermal overload protection.
The integrated LDO regulator provides a very low noise,
programmable low dropout supply.
n High Effi ciency Step-Up DC/DC Converter and LDO
Step-Up
n VIN: 0.68V to 5V, VOUT: 1.5V to 5.25V
I
OUT: 100mA at 3.3V, VIN >0.8V
n 2.2MHz Fixed Frequency Operation
n Synchronous Rectifi er with Output Disconnect
n Burst Mode Operation (Pin Selectable)
Linear LDO Regulator
n VIN: 1.8V to 5.5V, VOUT: 0.6V to 5V
IOUT: 100mA
n 100mV Dropout Voltage at 50mA
n 24dB Ripple Rejection at fSW
Combined
n Power Good Indicators
n Low-Battery Comparator
n 30µA IQ
n Low Profi le 3mm × 3mm × 0.75mm Package
n Wireless Microphones
n Portable Medical instruments
n Noise Cancelling/Portable Headsets
n RF and Audio Power
L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Effi ciency and Power Loss
vs Load Current
LOAD CURRENT (mA)
0.01
EFFICIENCY (%)
POWER LOSS (mW)
100
80
90
60
20
30
40
70
50
10
0
1000
10
0.1
1
100
0.01
100.1
3537 TA01b
10001100
EFFICIENCY
POWER LOSS
VINB, MODE = 1.8V
3537 TA01a
LTC3537
VINB
1µF
ALKALINE
0.8V
TO
1.6V
VOUTB
3.3V
VOLDO
3V
2.2µH
R6
665k
ENLDO
VOUTB
FBB
VINL
VOLDO
FBL
ENBST
MODE
PGND
SGND
SW
R2
1.74M
R1
1M
R3
511k
R4
2.05M
R5
1.0M
10µF
1µF
ONOFF
BURSTPWM
PGDL
PGDB
LBO
LBI
+
33pF
LTC3537
2
3537fd
PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS
VINB and VINL Voltage ................................... –0.3V to 6V
SW DC Voltage ............................................. –0.3V to 6V
SW Pulsed (<100ns) Voltage ....................... –0.3V to 7V
FBB, FBL, PGDB, PGDL Voltage ................... –0.3V to 6V
MODE, ENBST, ENLDO Voltage ................... –0.3V to 6V
LBI and LBO Voltage .................................... –0.3V to 6V
VOUTB, VOLDO ............................................... –0.3V to 6V
Operating Temperature (Notes 2, 5) ......... –40°C to 85°C
Junction Temperature ........................................... 125°C
Storage Temperature Range ................... –65°C to 125°C
(Note 1)
16 15 14 13
5 6 7 8
TOP VIEW
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
9
17 10
11
12
4
3
2
1MODE
LBI
SGND
VINB
VINL
VOLDO
FBL
FBB
LBO
PGND
SW
VOUTB
PGDB
ENBST
PGDL
ENLDO
TJMAX = 125°C, θJA = 68°C/W (Note 6)
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3537EUD#PBF LTC3537EUD#TRPBF LDBD 16-Lead (3mm × 3mm) Plastic QFN –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VINB = 1.2V, VOUTB = 3.3V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Boost Converter
VINMIN Minimum Start-Up Voltage ILOAD = 1mA 0.68 0.8 V
VOUTB Output Voltage Range l1.5 5.25 V
VFBB Feedback Voltage l1.179 1.21 1.240 V
IFBB Feedback Input Current 150 nA
IQSHDN Quiescent Current - Shutdown VENBST = VENLDO = 0V, Not Including SW Leakage,
VOUTB = 0V
0.02 1 µA
IQACTIVE Quiescent Current - Active Measured on VOUTB, Nonswitching, MODE = 1.2V,
VENLDO = 0V
300 500 µA
IQBURST Quiescent Current - Burst Measured on VOUTB, FBB >1.24V, MODE = 1.2V,
VENLDO = 0V
15 µA
INLEAK NMOS Switch Leakage Current VSW = 5V 0.1 5 µA
IPLEAK PMOS Switch Leakage Current VSW = 5V, VOUTB = 0V 0.1 10 µA
LTC3537
3
3537fd
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. (Note 2) VINB = 1.2V, VOUTB = 3.3V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
RNMOS NMOS Switch On Resistance VOUTB = 1.8V
VOUTB = 3.3V
VOUTB = 5V
0.8
0.4
0.3
RPMOS PMOS Switch On Resistance VOUTB = 1.8V
VOUTB = 3.3V
VOUTB = 5V
1
0.6
0.4
ILIM NMOS Current Limit (Note 4) l600 750 mA
tLIMDELAY Current Limit Delay Time to
Output
(Note 3) 40 ns
Max Duty Cycle VFBB = 1.15V l87 92 %
Min Duty Cycle VFBB = 1.3V l0%
fSW Switching Frequency l2 2.2 2.4 MHz
VENBSTH ENBST Input High Voltage 0.8 V
VENBSTL ENBST Input Low Voltage 0.3 V
IENBSTIN ENBST Input Current VENBST = 5.5V 1.5 µA
VMODEH MODE Input High Voltage 0.8 V
VMODEL MODE Input Low Voltage 0.3 V
IMODEIN MODE Input Current VMODE = 5.5V 1.5 µA
tSS Soft-Start Time 0.5 ms
VFBLBI LBI Feedback Voltage Falling Threshold 530 553 575 mV
LBI Hysteresis Voltage 35 mV
ILBIIN LBI Input Current VLBI = 1V 10 50 nA
VLBOLOW LBO Voltage Low ILBO = 5mA 200 mV
ILBOLEAK LBO Leakage Current VLBO = 5.5V 0.01 1 µA
VPGDBLOW PGDB Voltage Low IPGDB = 5mA 200 mV
IPGDBLEAK PGDB Leakage Current VPGDB = 5.5V 0.01 1 µA
PGDB Trip Point Voltage VFBB Rising 94 % VOUTB
PGDB Hysteresis 6%
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
LDO Regulator
VINL Input Voltage Range 1.8 5.5 V
VOLDO Output Voltage Range ILOAD = 100mA VFBL 5V
IOUTMAX Max Output Current l100 mA
VFBL Feedback Voltage l590 600 610 mV
Line Regulation VINL = 1.8V to 5.5V 0.1 %
Load Regulation ILOAD = 10mA to 90mA 0.4 %
VDROPOUT Dropout Voltage IO = 50mA 100 mV
The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 2)
VINL = 3.3V, VOLDO = 3V, unless otherwise noted.
LTC3537
4
3537fd
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3537 is guaranteed to meet performance specifi cations
from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Specifi cation is guaranteed by design and not 100% tested in
production.
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. (Note 2) VINL = 3.3V, VOLDO = 3V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
PSRR Ripple Rejection f = 2.2MHz at ILOAD = 100mA (Note 3) 24 dB
ISHORT Short Circuit Current Limit VOLDO = 0V l110 150 mA
VENLDOH ENLDO Input High Voltage 0.8 V
VENLDOL ENLDO Input Low Voltage 0.3 V
IENLDO ENLDO Input Current VENLDO = 5.5V 1.5 µA
VPGDLLOW PGDL Voltage Low IPGDL = 5mA 200 mV
IPGDLLEAK PGDL Leakage Current VPGDL = 5.5V 0.01 1 µA
PGDL Trip Point VFBL Rising 96 % VOLDO
PGDL Hysteresis 3%
Note 4: Current measurements are made when the output is not switching.
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specifi ed maximum operating junction
temperature may result in device degradation or failure.
Note 6: Failure to solder the exposed backside of the package to the PC
board ground plane will result in a thermal resistance much higher than
68°C/W.
LTC3537
5
3537fd
TYPICAL PERFORMANCE CHARACTERISTICS
Effi ciency vs Load Current and
VINB for VOUTB = 5V Maximum Output Current vs VINB
Minimum Load Resistance During
Start-Up vs VINB
Start-Up Delay Time vs VINB
Burst Mode Threshold Current
vs VINB
Burst Mode Threshold Current
vs VINB
Effi ciency vs Load Current and
VINB for VOUTB = 1.8V
Effi ciency vs Load Current and
VINB for VOUTB = 3.3V No-Load Input Current vs VINB
TA = 25°C unless otherwise noted.
LOAD CURRENT (mA)
0.01
EFFICIENCY (%)
POWER LOSS (mW)
100
80
90
60
20
30
40
70
50
10
0
1000
10
0.1
1
100
0.01
100.1
3537 G01
10001 100
PLOSS AT VINB = 1V
PLOSS AT VINB = 1.2V
PLOSS AT VINB = 1.5V
VINB = 1V
VINB = 1.2V
VINB = 1.5V
LOAD CURRENT (mA)
0.01
EFFICIENCY (%)
POWER LOSS (mW)
100
80
90
60
20
30
40
70
50
10
0
1000
10
0.1
1
100
0.01
100.1
3537 G02
10001 100
PLOSS AT VINB = 1.2V
PLOSS AT VINB = 1.8V
PLOSS AT VINB = 2.4V
PLOSS AT VINB = 2.8V
VINB = 1.2V
VINB = 1.8V
VINB = 2.4V
VINB = 2.8V
LOAD CURRENT (mA)
0.01
EFFICIENCY (%)
POWER LOSS (mW)
100
80
90
60
20
30
40
70
50
10
0
1000
10
0.1
1
100
0.01
100.1
3537 G04
10001 100
PLOSS AT VINB = 1.2V
PLOSS AT VINB = 2.4V
PLOSS AT VINB = 3.6V
PLOSS AT VINB = 4.2V
VINB = 1.2V
VINB = 2.4V
VINB = 3.6V
VINB = 4.2V
VINB (V)
0.5
LOAD CURRENT (mA)
1000
800
900
600
200
300
400
700
500
100
03.532.51.5
3537 G05
4.5214
VOUTB = 2.5V
VOUTB = 1.8V
VOUTB = 3.3V
VOUTB = 5V
VINB (V)
0.8
LOAD (Ω)
1000
100
10 1.61.51.41.31.21
3537 G06
1.81.10.9 1.7
VINB (V)
1
DELAY (µs)
60
30
20
10
50
40
04.543.532
3537 G07
52.51.5
VINB (V)
0.8
30
25
20
15
10
5
0
45
40
35
LOAD CURRENT (mA)
0.9 1 1.1 1.2 1.3 1.4
3537 G08
ENTER BURST
LEAVE BURST
VOUTB = 1.8V
COUTB = 10μF
L = 2.2μH
VINB (V)
0.8
30
25
20
15
10
5
0
50
45
40
35
LOAD CURRENT (mA)
11.2 1.4 1.6 1.8 2
3537 G09
ENTER BURST
LEAVE BURST
VOUTB = 2.5V
COUTB = 10μF
L = 2.2μH
VINB (V)
0.6
120
100
60
80
40
20
0
180
160
140
IINB (μA)
1.2 1.8 2.4 3 4.83.6 4.2
3537 G03
VOUTB = 5V
VOUTB = 3.3V
VOUTB = 2.5V
VOUTB = 1.8V
LTC3537
6
3537fd
TYPICAL PERFORMANCE CHARACTERISTICS
Feedback Voltage Change
vs Temperature Start-Up Voltage vs Temperature
Burst Mode Quiescent Current
vs VOUTB
TA = 25°C unless otherwise noted.
TEMPERATURE (°C)
–40
VOLTAGE CHANGE (%)
0.05
0.00
–0.10
–0.15
–0.20
–0.25
–0.30 40 60200
3537 G16
80–20
NORMALIZED TO 20°C
VFBB AND VFBL
TEMPERATURE (°C)
–40
VINB (V)
0.80
0.75
0.70
0.65
0.60
0.55
0.50 40 60200
3537 G17
80–20
VOUTB (V)
1.8
VOUTB(IQ) (µA)
60
50
30
40
20
10 3.8 4.33.32.8
3537 G18
4.82.3
VINB = 1.2V
ENLDO = HIGH
RDS(ON) vs VOUTB
Oscillator Frequency Change vs
Temperature RDS(ON) Change vs Temperature
VOUTB (V)
1.5
RDS(ON) (Ω)
1.0
0.9
0.8
0.7
0.6
0.5
0.3
0.4
0.2 3.5 4 4.532.5
3537 G13
52
NMOS
PMOS
TEMPERATURE (°C)
–40
FREQUENCY CHANGE (%)
1
0
–1
–2
–3
–4 40 60200
3537 G14
80–20
NORMALIZED TO 25°C
TEMPERATURE (°C)
–40
RDS(ON) CHANGE (%)
30
20
10
0
–10
–20
–30 40 60200
3537 G15
80–20
NMOS
PMOS
NORMALIZED TO 25°C
Burst Mode Threshold Current
vs VINB
Burst Mode Threshold Current
vs VINB
Oscillator Frequency Change
vs VOUTB
VINB (V)
0.8
30
20
10
0
60
50
40
LOAD CURRENT (mA)
11.2 1.4 1.6 1.8 2.42 2.2
3537 G10
ENTER BURST
LEAVE BURST
VOUTB = 3.3V
COUTB = 10μF
L = 2.2μH
VINB (V)
0.9
120
100
60
80
40
20
0
180
160
140
LOAD CURRENT (mA)
1.4 1.9 2.4 2.9 4.43.4 3.9
3537 G11
ENTER BURST
LEAVE BURST
VOUTB = 5V
COUTB = 10μF
L = 2.2μH
VOUTB (V)
1.5
FREQUENCY CHANGE (%)
1
0
–1
–2
–3
–5
–4
–6 3.5 4 4.532.5
3537 G12
52
NORMALIZED TO 3.3V
LTC3537
7
3537fd
Fixed Frequency Switching
Waveform and VOUTB Ripple Burst Mode Waveforms VOUTB and IINB During Soft-Start
TYPICAL PERFORMANCE CHARACTERISTICS
Load Current Step Response
(from Burst Mode Operation)
Load Current Step Response
(Fixed Frequency)
Load Current Step Response
(Fixed Frequency)
Load Current Step Response
(from Burst Mode Operation)
LDO Dropout Voltage vs
Load Current
TA = 25°C unless otherwise noted.
LOAD CURRENT (mA)
0
DROPOUT VOLTAGE (mV)
140
120
100
80
40
60
20
08070605040 903020
3537 G26
10010
VOUTB
20mV/DIV
IL
10mA/DIV
VINB = 2.4V
VOUTB = 3.3V
COUTB = 10µF
3537 G20
10µs/DIV
VINB = 2.4V
VOUTB = 3.3V
COUTB = 4.7µF
3537 G22
VOUTB
100mV/
DIV
ILOAD
100mA/
DIV
100µs/DIV VINB = 2.4V
VOUTB = 3.3V
COUTB = 4.7µF
3537 G23
ILOAD
100mA/
DIV
VOUTB
100mV/
DIV
100µs/DIV VINB = 3.6V
VOUTB = 5V
COUTB = 4.7µF
3537 G24
ILOAD
100mA/
DIV
VOUTB
100mV/
DIV
100µs/DIV
VINB = 3.6V
VOUTB = 5V
COUTB = 4.7µF
3537 G25
ILOAD
100mA/
DIV
VOUTB
100mV/
DIV
100µs/DIV
VINB = 2.4V
VOUTB = 3.3V
COUTB = 4.7µF
3537 G19
200ns/DIV
SW
2V/DIV
VOUTB
20mV/
DIV
ENBST
VOUTB
2V/DIV
IVINB
200mA/
DIV
VINB = 1.2V
VOUTB = 3.3V
COUTB = 4.7µF
ILOAD = 10mA
3537 G21
100µs/DIV
LDO Input Ripple Rejection vs
Frequency
FREQUENCY (kHz)
ATTENUATIOIN (dB)
3537 G29
60
50
40
30
20
10
0
0.01 0.1 1 10 100
VINL = 3.3V
VOLDO = 3V
COLDO = 4.7µF
ILOAD = 50mA
LTC3537
8
3537fd
TYPICAL PERFORMANCE CHARACTERISTICS
LDO Load Current Step Response
LDO Load Current Step Response LDO Load Current Step Response
TA = 25°C unless otherwise noted.
VINL = 5V
VOLDO = 3V
COUT = 1µF
3537 G32
ILOAD
100mA/
DIV
VOLDO
100mV/
DIV
100µs/DIV
VINL = 3.3V
VOLDO = 3V
COUT = 1µF
3537 G31
ILOAD
100mA/
DIV
VOLDO
100mV/
DIV
100µs/DIV
VINL = 5V
VOLDO = 1.8V
COUT = 1µF
3537 G33
ILOAD
100mA/
DIV
VOLDO
100mV/
DIV
100µs/DIV
LDO Current Limit vs Temperature
TEMPERATURE (°C)
–40
LOAD CURRENT (%)
7
6
5
4
2
3
1
–1
0
–2 6040200
3537 G30
80–20
NORMALIZED TO 25°C
LTC3537
9
3537fd
PIN FUNCTIONS
MODE (Pin 1): Logic Controlled Input for the Auto-Burst
Mode Feature.
MODE = High: PWM operation with Burst Mode
Operation
MODE = Low: PWM operation only
LBI (Pin 2): Low-Battery Comparator Non-Inverting Input.
(Comparator enabled with ENBST or ENLDO)
SGND (Pin 3): Signal Ground. Provide a short direct PCB
path between GND and the (–) side of the input and output
capacitors.
VINB (Pin 4): Input Supply for the Step-Up Converter.
Connect a minimum of 1µF ceramic decoupling capacitor
from this pin to ground.
PGDB (Pin 5): Power Good Indicator for the Boost Con-
verter. This is an open-drain output that sinks current
when VOUTB is less than 94% of the programmed voltage.
ENBST (Pin 6): Logic controlled shutdown input for the
boost converter.
ENBST = High: Normal operation
ENBST = Low: Shutdown
PGDL (Pin 7): Power Good Indicator for the LDO Regula-
tor. This is an open-drain output that sinks current when
VOLDO is less than 96% of the programmed voltage.
ENLDO (Pin 8): Logic Controlled Shutdown Input for the
LDO Regulator.
ENLDO = High: Normal operation
ENLDO = Low: Shutdown
FBB (Pin 9): Feedback Input to the gm Error Amplifi er
of the Boost Converter. Connect resistor divider tap to
this pin. The output voltage can be adjusted from 1.5V
to 5.25V by:
V
OUTB = 1.21V • [1 + (R2/R1)]
FBL (Pin 10): Feedback Input to the gm Error Amplifi er of
the LDO. Connect resistor divider tap to this pin. The output
voltage can be adjusted from 0.6V (typical) to 5V by:
V
OLDO = 0.6V • [1 + (R4/R3)]
VOLDO (Pin 11): LDO Regulator Output. PCB trace from
VOLDO to the output fi lter capacitor (1µF minimum) should
be as short and as wide as possible.
VINL (Pin 12): Input Supply for the LDO Regulator.
VOUTB (Pin 13): Output Voltage Sense Input and Drain
of the Internal Synchronous Rectifi er. PCB trace length
from VOUTB to the output fi lter capacitor (4.7µF minimum)
should be as short and wide as possible.
SW (Pin 14): Switch Pin. Connect the inductor between
SW and VINB. Keep these PCB trace lengths as short and
wide as possible to reduce EMI. If the inductor current falls
to zero or ENBST is low, an internal anti-ringing switch is
connected from SW to VINB to minimize EMI.
PGND (Pin 15): Power Ground. Provide a short direct
PCB path between GND and the (–) side of the input and
output capacitors.
LBO (Pin 16): Low-Battery Comparator Output. (Open-
Drain)
GND (Exposed Pad Pin 17): Power Ground. The Exposed
Pad must be soldered to the PCB.
LTC3537
10
3537fd
BLOCK DIAGRAM
–
+
–
+
+
–
FBB
1.14V
0.55V
–
+
3537 BD
SW
ENBST
VOUTB
LBO MODE SGND PGNDLBI
VINB
ENLDO
PGDB
PGDL
FBB
VINL
VOLDO
FBL
+
–
FBL
0.58V
+
–
+
–
0.6V
LOGIC
GATE DRIVERS
AND
ANTI-CROSS
CONDUCTION
THERMAL
SHUTDOWN
2.2MHz
OSC
MODE
CONTROL
GATE
DRIVER
STARTUP
CLAMP
SHUTDOWN SHUTDOWN
VBEST
VOUT
VBEST
UVLO
VREF VREF
1.21V
VREF
Σ
WELL
SWITCH
WELL
SWITCH
R2
R1
R4
R3
SLOPE
COMPENSATION
R5
R6
VIN
LTC3537
11
3537fd
OPERATION
The LTC3537 is a 2.2MHz synchronous step-up (boost)
converter and LDO regulator housed in a 16-lead 3mm
× 3mm QFN package. Included with the ability to start
up and operate from inputs less than 0.7V, the LTC3537
features fi xed frequency, current mode PWM control for
exceptional line and load regulation.
The current mode architecture with adaptive slope com-
pensation provides excellent transient load response,
requiring minimal output fi ltering. Internal soft-start and
loop compensation simplifi es the design process while
minimizing the number of external components. With its low
RDS(ON) and low gate charge internal N-channel MOSFET
switch and P-channel MOSFET synchronous rectifi er, the
LTC3537 achieves high effi ciency over a wide range of
load currents. Automatic Burst Mode operation maintains
high effi ciency at very light loads, reducing the quiescent
current to just 30µA. Operation can be best understood
by referring to the Block Diagram.
LOW VOLTAGE START-UP
The LTC3537 step-up converter includes an independent
start-up oscillator designed to operate at an input voltage
of 0.68V (typical). Soft-start and inrush current limiting
are provided during start-up, as well as normal mode.
When either VINB or VOUTB exceeds 1.4V typical, the IC
enters normal operating mode. When the output voltage
exceeds the input by 0.24V, the IC powers itself from VOUTB
instead of VINB. At this point the internal circuitry has no
dependency on the VINB input voltage, eliminating the
requirement for a large input capacitor. The input voltage
can drop as low as 0.5V after start-up is achieved. The
limiting factor for the application becomes the availability
of the power source to supply suffi cient energy to the
output at low voltages, and maximum duty cycle, which
is clamped at 92% typical. Note that at low input voltages,
small voltage drops due to series resistance become
critical, and greatly limit the power delivery capability of
the converter.
LOW NOISE FIXED FREQUENCY OPERATION
Soft-Start
The LTC3537 contains internal circuitry to provide soft-
start operation. The soft-start circuitry slowly ramps the
peak inductor current from zero to its peak value of 750mA
(typical) in approximately 0.5ms, allowing start-up into
heavy loads. The soft-start circuitry is reset in the event
of a shutdown command or a thermal shutdown.
Oscillator
An internal oscillator sets the switching frequency to
2.2MHz.
Shutdown
Shutdown of the boost converter is accomplished by
pulling ENBST below 0.3V and enabled by pulling ENBST
above 0.8V. Note that ENBST can be driven above VINB or
VOUTB, as long as it is limited to less than the absolute
maximum rating.
Boost Error Amplifi er
The non-inverting input of the transconductance error
amplifi er is internally connected to the 1.2V reference
and the inverting input is connected to FBB. Clamps limit
the minimum and maximum error amp output voltage for
improved large-signal transient response. Power converter
control loop compensation is provided internally. An exter-
nal resistive voltage divider from VOUTB to ground programs
the output voltage via FBB from 1.5V to 5.25V.
VOUTB =1.21V 1+R2
R1
⎛
⎝
⎜⎞
⎠
⎟
Boost Current Sensing
Lossless current sensing converts the peak current signal of
the N-channel MOSFET switch into a voltage that is summed
with the internal slope compensation. The summed signal
is compared to the error amplifi er output to provide a peak
current control command for the PWM.
LTC3537
12
3537fd
OPERATION
Boost Current Limit
The current limit comparator shuts off the N-channel
MOSFET switch once its threshold is reached. The cur-
rent limit comparator delay to output is typically 40ns.
Peak switch current is limited to approximately 750mA,
independent of input or output voltage, unless VOUTB falls
below 0.8V, in which case the current limit is cut in half.
Boost Zero Current Comparator
The zero current comparator monitors the inductor cur-
rent to the output and shuts off the synchronous rectifi er
when this current reduces to approximately 30mA. This
prevents the inductor current from reversing in polarity,
improving effi ciency at light loads.
Boost Synchronous Rectifi er
To control inrush current and to prevent the inductor cur-
rent from running away when VOUTB is close to VINB, the
P-channel MOSFET synchronous rectifi er is only enabled
when VOUTB > (VINB + 0.24V).
Boost Anti-Ringing Control
The anti-ringing control connects a resistor across the
inductor to prevent high frequency ringing on the SW pin
during discontinuous current mode operation. Although
the ringing of the resonant circuit formed by L and CSW
(capacitance on SW pin) is low energy, it can cause EMI
radiation.
Boost Output Disconnect
The LTC3537 is designed to allow true output disconnect
by eliminating body diode conduction of the internal P-
channel MOSFET synchronous rectifi er. This allows VOUTB
to go to zero volts during shutdown, drawing no current
from the input source. It also allows inrush current limit-
ing at turn-on, minimizing surge currents seen by the
input supply. Note that to obtain the advantages of output
disconnect, there cannot be an external Schottky diode
connected between the SW pin and VOUTB. The output
disconnect feature also allows VOUTB to be pulled high,
above the nominal regulation voltage, without any reverse
current into the power source connected to VINB.
Thermal Overload Protection
If the die temperature exceeds 160°C typical, the LTC3537
boost converter will shut down. All switches will be off
and the soft-start capacitor will be discharged. The boost
converter will be enabled when the die temperature drops
by approximately 15°C.
BOOST BURST MODE OPERATION
When enabled (MODE pin high), the LTC3537 will auto-
matically enter Burst Mode operation at light load current
and return to fi xed frequency PWM mode when the load
increases. Refer to the Typical Performance Characteristics
to see the Burst Mode Threshold Current vs VINB. The
load current at which Burst Mode operation is entered can
be changed by adjusting the inductor value. Raising the
inductor value will lower the load current at which Burst
Mode operation is entered.
In Burst Mode operation, the LTC3537 still switches at a
fi xed frequency of 2.2MHz, using the same error amplifi er
and loop compensation for peak current mode control.
This control method eliminates any output transient when
switching between modes. In Burst Mode operation, en-
ergy is delivered to the output until it reaches the nominal
voltage regulation value, then the LTC3537 transitions to
sleep mode where the outputs are off and the LTC3537
consumes only 30µA of quiescent current from VOUTB
including the current required to keep the LDO enabled.
When the output voltage droops slightly, switching re-
sumes. This maximizes effi ciency at very light loads by
minimizing switching and quiescent losses. Burst Mode
output voltage ripple, which is typically 1% peak-to-peak,
can be reduced by using more output capacitance (10µF
or greater), or with a small capacitor (10pF to 50pF) con-
nected between VOUTB and FBB.
As the load current increases, the LTC3537 will automati-
cally leave Burst Mode operation. Note that larger output
capacitor values may cause this transition to occur at lighter
loads. Once the LTC3537 has left Burst Mode operation and
returned to normal operation, it will remain there until the
output load is reduced below the burst threshold.
LTC3537
13
3537fd
OPERATION
Burst Mode operation is inhibited during start-up and soft-
start and until VOUTB is at least 0.24V greater than VINB.
The LTC3537 will operate at a continuous PWM frequency
of 2.2MHz by connecting MODE to GND. At very light loads,
the LTC3537 will exhibit pulse-skip operation.
Single Cell to 5V Step-Up Applications
Due to the high inductor current slew rate in applications
boosting to 5V from a single-cell (alkaline, NiCd or NiMH),
the LTC3537 may not enter Burst Mode operation for input
voltages less than 1.2V. Refer to the Typical Performance
Characteristics curves for the Burst Mode thresholds for
different input and output voltages.
LDO REGULATOR OPERATION
The LTC3537 includes an independent 100mA low dropout
linear regulator (LDO). The VINL pin can be connected to
an independent source or connected to the output of the
boost regulator. An input capacitor on VINL is optional, but
it will help to improve transient responses. The LDO will
operate with a VINL down to 1.5V, but specifi cations are
guaranteed with VINL from 1.8V to 5.5V.
Shutdown
Shutdown of the LDO is accomplished by pulling ENLDO
below 0.3V and enabled by pulling ENLDO above 0.8V. Note
that ENLDO can be driven above VINL or VOLDO, as long
as it is limited to less than the absolute maximum rating.
In the event that the LDO output voltage is held above the
input voltage, the LDO goes in to shutdown until the output
drops back below the input voltage. In shutdown the LDO
will block reverse current from VOLDO to VINL.
LDO Error Amplifi er
The non-inverting input of the transconductance error
amplifi er is internally connected to a 0.6V reference and
the inverting input is connected to FBL. The control loop
compensation is provided internally. An external resistive
voltage divider from VOLDO to ground programs the output
voltage via FBL from 0.6V to 5V.
VOLDO =0.6V 1+R4
R3
⎛
⎝
⎜⎞
⎠
⎟
LDO Current Sensing and Limiting
Current is sensed across an internal resistor. The guaran-
teed minimum output current is 100mA.
LOW-BATTERY INDICATOR
The LTC3537 includes a low-battery comparator. The non-
inverting input of the comparator is internally connected
to a 0.58V reference and the inverting input is connected
to LBI. An external resistive voltage divider from VINL to
ground programs the threshold voltage. When the volt-
age at LBI drops below 0.58V, the open-drain N-channel
MOSFET will turn on. The N-channel MOSFET device is
forced off when both the step-up converter and LDO are
in shutdown.
VLBI =0.58V 1+R6
R5
⎛
⎝
⎜⎞
⎠
⎟
BOOST POWER-GOOD INDICATOR
The LTC3537 includes a power-good comparator for the
step-up converter. The non-inverting input of the compara-
tor is internally connected to a 1.08V reference and the
inverting input is connected to the FBB pin. The open-drain
MOSFET on PGDB will turn off when the output voltage
is typically within 6% of the programmed output voltage.
Output sequencing can be achieved by connecting PGDB to
the LDO enable pin (ENLDO). This would allow the user to
keep the LDO off until the step-up converter is regulating.
The N-channel MOSFET is forced on in shutdown.
LDO POWER-GOOD INDICATOR
The LTC3537 includes a power-good comparator for the
LDO. The non-inverting input of the comparator is internally
connected to a 540mV reference and the inverting input is
connected to the FBL pin. The open-drain MOSFET on the
PGDL pin will turn off when the output voltage is typically
within 4% of the programmed output voltage.
Output sequencing can be achieved by connecting PGDL to
the boost enable pin (ENBST). This would allow the user to
keep the step-up converter off until the LDO is regulating.
The N-channel MOSFET is forced on in shutdown.
LTC3537
14
3537fd
APPLICATIONS INFORMATION
VINB > VOUTB OPERATION
The LTC3537 step-up converter will maintain voltage regu-
lation even when the input voltage is above the desired
output voltage. Note that the effi ciency is much lower in this
mode, and the maximum output current capability will be
less. Refer to the Typical Performance Characteristics.
STEP-UP SHORT-CIRCUIT PROTECTION
The LTC3537 output disconnect feature provides output
short circuit protection. To reduce power dissipation under
short-circuit conditions, the peak switch current limit is
reduced to 400mA (typical).
SCHOTTKY DIODE
Although it is not required, adding a Schottky diode from
SW to VOUTB will improve effi ciency by about 4%. Note
that this defeats the output disconnect and short-circuit
protection features.
PCB LAYOUT GUIDELINES
The high speed operation of the LTC3537 demands careful
attention to board layout. A careless layout will result in
reduced performance. Figure 1 shows the recommended
component placement. A large ground pin copper area
will help to lower the die temperature. A multilayer board
with a separate ground plane is ideal, but not absolutely
necessary.
COMPONENT SELECTION
Inductor Selection
The LTC3537 can utilize small surface mount chip induc-
tors due to its fast 2.2MHz switching frequency. Inductor
values between 1µH and 4.7µH are suitable for most ap-
plications. Larger values of inductance will allow slightly
greater output current capability (and lower the Burst
Mode threshold) by reducing the inductor ripple current.
Increasing the inductance above 10µH will increase size
while providing little improvement in output current capa-
bility. The minimum inductance value is given by:
L>VINB(MIN) •VOUTB(MAX) −VINB(MIN)
()
2.2 •Ripple•VOUTB(MAX)
where:
Ripple = Allowable inductor current ripple (amps
peak-peak)
V
INB(MIN) = Minimum converter input voltage
V
OUTB(MAX) = Maximum output voltage
The inductor current ripple is typically set for 20% to
40% of the maximum inductor current. High frequency
ferrite core inductor materials reduce frequency dependent
power losses compared to cheaper powdered iron types,
improving effi ciency. The inductor should have low ESR
(series resistance of the windings) to reduce the I2R power
losses, and must be able to support the peak inductor
current without saturating. Molded chokes and some chip
inductors usually do not have enough core area to support
the peak inductor currents of 750mA seen on the LTC3537.
To minimize radiated noise, use a shielded inductor. See
Table 1 for suggested components and suppliers.
Figure 1
3537 F01
5678
16 15 14 13
LBO SW VOUTB
MODE VINL
VOLDO
LBI
SGND
VINB
FBL
FBB
1
2
3
4
12
11
10
9
+
PGDB ENBST PGDL ENLDO MULTIPLE VIAS
TO INNER GROUND LAYERS
LTC3537
15
3537fd
APPLICATIONS INFORMATION
Table 1: Recommended Inductors
VENDOR PART/STYLE
Coilcraft
(847) 639-6400
www.coilcraft.com
LPO4815
LPS4012, LPS4018
MSS5131
MSS4020
MOS6020
ME3220
DS1605, DO1608
Coiltronics
www.cooperet.com
SD10, SD12, SD14, SD18,
SD20,
SD52, SD3114, SD3118
FDK
(408) 432-8331
www.fdk.com
MIP3226D4R7M,
MIP3226D3R3M
MIPF2520D4R7
MIPWT3226D3R0
Murata
(714) 852-2001
www.murata.com
LQH43C
LQH32C (-53 series)
301015
Sumida
(847) 956-0666
www.sumida.com
CDRH5D18
CDRH2D14
CDRH3D16
CDRH3D11
CR43
CMD4D06-4R7MC
CMD4D06-3R3MC
Taiyo-Yuden
www.t-yuden.com
NP03SB
NR3015T
NR3012T
TDK
(847) 803-6100
www.component.tdk.com
VLP
VLF, VLCF
Toko
(408) 432-8282
www.tokoam.com
D412C
D518LC
D52LC
D62LCB
Wurth
(201) 785-8800
www.we-online.com
WE-TPC Type S, M
Output and Input Capacitor Selection
Low ESR (equivalent series resistance) capacitors should
be used to minimize the output voltage ripple. Multilayer
ceramic capacitors are an excellent choice as they have
extremely low ESR and are available in small footprints.
A 4.7µF to 10µF output capacitor is suffi cient for most
boost applications. Larger values up to 22µF may be used
to obtain extremely low output voltage ripple and improve
transient response. X5R and X7R dielectric materials are
preferred for their ability to maintain capacitance over
wide voltage and temperature ranges. Y5V types should
not be used.
The internal loop compensation of the LTC3537 is designed
to be stable with a minimum output capacitor value of
4.7µF when in PWM mode on the boost regulator and
1µF or greater on the LDO regulator. Although ceramic
capacitors are recommended, low ESR tantalum capaci-
tors may be used as well. For the LDO, see Figures 2 and
3 for output capacitor value and ESR requirements. To
reduce Burst Mode boost output voltage ripple, 10µF is
recommended.
Figure 2. LDO Regulator Output Capacitance vs ESR
Figure 3. LDO Regulator Minimum Output Capacitance
vs VINL/VOLDO
CAPACITANCE (µF)
ESR ()
3537 F02
1.6
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.0 1 10 100
REGION OF
OPERATION
VINL/VOLDO
1
MINIMUM OUTPUT CAPACITANCE (µF)
5.0
4.5
3.5
3.0
2.5
2.0
1.0
4.0
1.5
0.5
0.0 436
3537 F03
725
LTC3537
16
3537fd
APPLICATIONS INFORMATION
For the step-up converter, a tantalum capacitor may be used
in demanding applications that have large load transients.
Another method of improving the transient response is to
add a small feedforward capacitor across the top resistor
of the feedback divider (from VOUTB to FBB). A typical value
of 22pF will generally suffi ce.
Ceramic capacitors are also a good choice for input de-
coupling of the step-up converter and should be located
as close as possible to the device. A 2.2µF input capacitor
is suffi cient for most applications, although larger values
may be used without limitations. The LDO regulator will
have improved performance with an input capacitor, but
it is not required. Table 2 shows a list of several ceramic
capacitor manufacturers. Consult the manufacturers di-
rectly for detailed information on their selection of ceramic
capacitors.
Table 2. Capacitor Vendor Information
SUPPLIER PHONE WEBSITE
AVX (803) 448-9411 www.avxcorp.com
Murata (714) 852-2001 www.murata.com
Taiyo-Yuden (408) 573-4150 www.t-yuden.com
TDK (847) 803-6100 www.component.tdk.com
Samsung (408) 544-5200 www.sem.samsung.com
LTC3537
17
3537fd
1-Cell to 1.8V, 1.5V
3537 TA02
LTC3537
VINB
1µF
VOUTB
1.8V
VOLDO
1.5V
2.2µH
R6
665k
ENDLO
VOUTB
FBB
VINL
VOLDO
FBL
ENBST
MODE
PGND
SGND
SW
R2
499k
R1
1M
R3
1M
R4
1.5M
R5
1M
10µF
1µF
ONOFF
BURSTPVM
PGDL
PGDB
LBO
LBI
ALKALINE
0.8V
TO
1.6V
+
33pF
TYPICAL APPLICATIONS
1-Cell to 3.3V, 2.8V
3537 TA03
LTC3537
VINB
1µF
VOUTB
3.3V
VOLDO
2.8V
2.2µH
R6
665k
ENDLO
VOUTB
FBB
VINL
VOLDO
FBL
ENBST
MODE
PGND
SGND
SW
R2
1.74M
R1
1M
R3
301k
R4
1.1M
R5
1M
10µF
1µF
ONOFF
BURSTPVM
PGDL
PGDB
LBO
LBI
ALKALINE
0.8V
TO
1.6V
+
33pF
LTC3537
18
3537fd
TYPICAL APPLICATIONS
2-Cell to Low Noise 3.3V
2-Cell to 5V, 1.8V
3537 TA04
LTC3537
VINB
2-CELL
ALKALINE
1.6V TO 3.2V
1µF
VOLDO
3.3V
2.2µH
R6
2M
ENDLO
VOUTB
FBB
VINL
VOLDO
FBL
ENBST
MODE
PGND
SGND
SW
R2
2M
R1
1M
R3
523k
R4
2.37M
R5
1M
10µF
1µF
ONOFF
BURSTPVM
PGDL
PGDB
LBO
LBI
+33pF
3537 TA05
LTC3537
VINB
1µF VOLDO
1.8V
2.2µH
R6
2M
ENDLO
VOUTB
FBB
VINL
VOLDO
FBL
ENBST
MODE
PGND
SGND
SW
R2
1.91M
R1
604k
R3
1M
R4
2M
R5
1M
10µF
1µF
ONOFF
BURSTPVM
PGDL
PGDB
LBO
LBI
VOUTB
5V
2-CELL
ALKALINE
1.6V TO 3.2V
+33pF
LTC3537
19
3537fd
TYPICAL APPLICATIONS
Single Cell or 5V Input to 3.3V
3537 TA07
LTC3537
VINB
1µF
2.2µH
ENLDO
VOUTB
FBB
VINL
VOLDO
FBL
ENBST
MODE
PGND
SGND
SW
R3
1.74M
R1
487k
R2
511k
R5
1.02M
R6
510k
10µF
3.3V/100mA
ONOFF
BURSTPWM
PGDL
PGDB
LBO
LBI
0.8V TO 1.6V
ALKALINE
+
USB
OR
5V ADAPTER 10F
+
33pF
Li-Ion to 5V, 3.3V
3537 TA06
LTC3537
VINB
1µF
VOUTB
5V
VOLDO
3.3V
2.2µH
R6
2M
ENDLO
VOUTB
FBB
VINL
VOLDO
FBL
ENBST
MODE
PGND
SGND
SW
R2
1.91M
R1
604k
R3
523k
R4
2.37M
R5
499k
Li-Ion 10µF
1µF
ONOFF
BURSTPVM
PGDL
PGDB
LBO
LBI
+
2.8V
TO
4.2V
33pF
LTC3537
20
3537fd
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
3.00 p 0.10
(4 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.45 p 0.05
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.40 p 0.10
BOTTOM VIEW—EXPOSED PAD
1.45 p 0.10
(4-SIDES)
0.75 p 0.05 R = 0.115
TYP
0.25 p 0.05
1
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 s 45o CHAMFER
15 16
2
0.50 BSC
0.200 REF
2.10 p 0.05
3.50 p 0.05
0.70 p0.05
0.00 – 0.05
(UD16) QFN 0904
0.25 p0.05
0.50 BSC
PACKAGE OUTLINE
LTC3537
21
3537fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
D 12/12 Corrected from LBO to LBO
Corrected Burst Mode Quescent Current Graph
Corrected Typos
Throughout
6
9
(Revision history begins at Rev D)
LTC3537
22
3537fd
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
LT 1212 REV D • PRINTED IN USA
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400mA Micropower Synchronous Step-Up DC/DC
Converter with Output Disconnect
95% Effi ciency, VIN: 1V to 4.5V, VOUT = 3.0V, 3.3V or 5V, IQ = 7µA,
ISD <1µA, SC-70 Package
LTC3525L-3 400mA Micropower Synchronous Step-Up DC/DC
Converter with Output Disconnect
90% Effi ciency, VIN: 0.7V to 4.5V, VOUT = 3V, IQ = 7µA, ISD < 1µA,
SC70 Package
LTC3526L/
LTC3526LB
550mA, 1MHz Synchronous Step-Up DC/DC Converter 95% Effi ciency, VIN: 0.75V to 5V, VOUT(MAX): 1.5V to 5.25V, IQ = 9µA,
ISD <1µA, DFN6 Package
LTC3528/
LTC3528B
1A, 1MHz, Synchronous Step-Up DC/DC Converters 94% Effi ciency, VIN: 0.7V to 5V, VOUT: 1.6V to 5.25V, IQ = 12µA, ISD < 1µA,
2mm × 3mm DFN Package, LTC3528B (PWM Mode Only)
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