© Semiconductor Components Industries, LLC, 2007
February, 2007 − Rev. 7 1Publication Order Number:
1.5SMC6.8AT3/D
1.5SMC6.8AT3 Series
1500 Watt Peak Power
Zener Transient Voltage
Suppressors
Unidirectional*
The SMC series is designed to protect voltage sensitive
components from high voltage, high energy transients. They have
excellent clamping capability, high surge capability, low zener
impedance and fast response time. The SMC series is supplied in
ON Semiconductor’s exclusive, cost-effective, highly reliable
Surmetic™ package and is ideally suited for use in communication
systems, automotiv e, numerical controls, process controls, medical
equipment, business machines, power supplies and many other
industrial/consumer applications.
Specification Features
•Working Peak Reverse Voltage Range − 5.8 to 77.8 V
•Standard Zener Breakdown Voltage Range − 6.8 to 91 V
•Peak Power − 1500 W @ 1.0 ms
•ESD Rating of Class 3 (>16 kV) per Human Body Model
•Maximum Clamp Voltage @ Peak Pulse Current
•Low Leakage < 5.0 mA Above 10 V
•UL 497B for Isolated Loop Circuit Protection
•Maximum Temperature Coefficient Specified
•Response Time is Typically < 1.0 ns
•Pb−Free Packages are Available
Mechanical Characteristics
CASE: Void-free, transfer-molded, thermosetting plastic
FINISH: All external surfaces are corrosion resistant and leads are
readily solderable
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:
260°C for 10 Seconds
LEADS: Modified L−Bend providing more contact area to bond pads
POLARITY: Cathode indicated by molded polarity notch
MOUNTING POSITION: Any
PLASTIC SURFACE MOUNT
ZENER OVERVOLTAGE
TRANSIENT SUPPRESSORS
5.8 − 78 VOLTS
1500 WATT PEAK POWER
Device*Package Shipping†
ORDERING INFORMATION
1.5SMCxxxAT3 SMC 2500/Tape & Reel
SMC
CASE 403
PLASTIC
Cathode Anode
MARKING DIAGRAM
**Bidirectional devices will not be available in this
series.
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Individual devices are listed on page 3 of this data sheet.
*The “T3” suffix refers to a 13 inch reel.
† For information on tape and reel specifications,
including part orientation and tape sizes, please
refer t o our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
1.5SMCxxxAT3G SMC
(Pb−Free) 2500/Tape & Reel
xxxA = Specific Device Code
(See Table on Page 3)
A = Assembly Location
Y = Year
WW = Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
AYWW
xxxAG
G
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MAXIMUM RATINGS
Rating Symbol Value Unit
Peak Power Dissipation (Note 1) @ TL = 25°C, Pulse Width = 1 ms PPK 1500 W
DC Power Dissipation @ TL = 75°C
Measured Zero Lead Length (Note 2)
Derate Above 75°C
Thermal Resistance, Junction−to−Lead
PD
RqJL
4.0
54.6
18.3
W
mW/°C
°C/W
DC Power Dissipation (Note 3) @ TA = 25°C
Derate Above 25°C
Thermal Resistance from Junction−to−Ambient
PD
RqJA
0.75
6.1
165
W
mW/°C
°C/W
Forward Surge Current (Note 4) @ TA = 25°C IFSM 200 A
Operating and Storage Temperature Range TJ, Tstg −65 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 10 X 1000 ms, non−repetitive
2. 1 in. square copper pad, FR−4 board
3. FR−4 board, using ON Semiconductor minimum recommended footprint, as shown in 403 case outline dimensions spec.
4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless
otherwise noted, VF = 3.5 V Max. @ IF (Note 5) = 100 A)
Symbol Parameter
IPP Maximum Reverse Peak Pulse Current
VCClamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IRMaximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
ITTest Current
QVBR Maximum Temperature Coefficient of VBR
IFForward Current
VFForward Voltage @ IF
5. 1/2 sine wave or equivalent, PW = 8.3 ms non−repetitive duty
cycle
Uni−Directional TVS
IPP
IF
V
I
IR
IT
VRWM
VCVBR VF
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ELECTRICAL CHARACTERISTICS (Devices listed in bold, italic are ON Semiconductor Preferred devices.)
Device*Device
Marking
VRWM
(Note 6) IR @ VRWM
Breakdown Voltage VC @ IPP (Note 8)
QVBR
VBR V (Note 7) @ ITVCIPP
VmAMin Nom Max mA V A %/5C
1.5SMC6.8AT3, G
1.5SMC7.5AT3, G
1.5SMC8.2AT3, G
1.5SMC9.1AT3
6V8A
7V5A
8V2A
9V1A
5.8
6.4
7.02
7.78
1000
500
200
50
6.45
7.13
7.79
8.65
6.8
7.5
8.2
9.1
7.14
7.88
8.61
9.55
10
10
10
1
10.5
11.3
12.1
13.4
143
132
124
112
0.057
0.061
0.065
0.068
1.5SMC10AT3
1.5SMC11AT3
1.5SMC12AT3, G
1.5SMC13AT3, G
10A
11A
12A
13A
8.55
9.4
10.2
11.1
10
5
5
5
9.5
10.5
11.4
12.4
10
11
12
13
10.5
11.6
12.6
13.7
1
1
1
1
14.5
15.6
16.7
18.2
103
96
90
82
0.073
0.075
0.078
0.081
1.5SMC15AT3, G
1.5SMC16AT3, G
1.5SMC18AT3, G
1.5SMC20AT3, G
15A
16A
18A
20A
12.8
13.6
15.3
17.1
5
5
5
5
14.3
15.2
17.1
19
15
16
18
20
15.8
16.8
18.9
21
1
1
1
1
21.2
22.5
25.2
27.7
71
67
59.5
54
0.084
0.086
0.088
0.09
1.5SMC22AT3, G
1.5SMC24AT3, G
1.5SMC27AT3, G
1.5SMC30AT3, G
22A
24A
27A
30A
18.8
20.5
23.1
25.6
5
5
5
5
20.9
22.8
25.7
28.5
22
24
27
30
23.1
25.2
28.4
31.5
1
1
1
1
30.6
33.2
37.5
41.4
49
45
40
36
0.092
0.094
0.096
0.097
1.5SMC33AT3, G
1.5SMC36AT3, G
1.5SMC39AT3, G
1.5SMC43AT3, G
33A
36A
39A
43A
28.2
30.8
33.3
36.8
5
5
5
5
31.4
34.2
37.1
40.9
33
36
39
43
34.7
37.8
41
45.2
1
1
1
1
45.7
49.9
53.9
59.3
33
30
28
25.3
0.098
0.099
0.1
0.101
1.5SMC47AT3, G
1.5SMC51AT3, G
1.5SMC56AT3, G
1.5SMC62AT3, G
47A
51A
56A
62A
40.2
43.6
47.8
53
5
5
5
5
44.7
48.5
53.2
58.9
47
51
56
62
49.4
53.6
58.8
65.1
1
1
1
1
64.8
70.1
77
85
23.2
21.4
19.5
17.7
0.101
0.102
0.103
0.104
1.5SMC68AT3, G
1.5SMC75AT3, G
1.5SMC82AT3, G
1.5SMC91AT3, G
68A
75A
82A
91A
58.1
64.1
70.1
77.8
5
5
5
5
64.6
71.3
77.9
86.5
68
75
82
91
71.4
78.8
86.1
95.5
1
1
1
1
92
103
113
125
16.3
14.6
13.3
12
0.104
0.105
0.105
0.106
Devices listed in bold, italic are ON Semiconductor Preferred devices. Preferred devices are recommended choices for future use and best overall value.
6. A transient suppressor is normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than
the DC or continuous peak operating voltage level.
7. VBR measured at pulse test current IT at an ambient temperature of 25°C.
8. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data − 1500 Watt at the beginning of this group.
*The “G” suffix indicates Pb−Free package available.
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4
NONREPETITIVE
PULSE WAVEFORM
SHOWN IN FIGURE 2
tP
, PULSE WIDTH
1
10
100
0.1 ms1 ms10 ms 100 ms1 ms 10 ms
Figure 1. Pulse Rating Curve
01234
0
50
100
t, TIME (ms)
VALUE (%)
HALF VALUE − IPP
2
PEAK VALUE − IPP
Figure 2. Pulse Waveform
Figure 3. Pulse Derating Curve
PEAK PULSE DERATING IN % OF
PEAK POWER OR CURRENT @ T
A= 25 C°
100
80
60
40
20
00 25 50 75 100 125 150
TA, AMBIENT TEMPERATURE (°C)
120
140
160
tP
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE PEAK
CURRENT DECAYS TO 50%
OF IPP
.
DVBR, INSTANTANEOUS INCREASE IN VBR ABOVE VBR (NOM) (VOLTS)
0.3 0.5 0.7 1 2 3 5 7 10 20 30
1000
500
200
100
50
1
2
5
10
20
TL=25°C
tP=10ms
VBR(NOM)=6.8TO13V
20V
24V 43V
75V
120V
180V
Figure 4. Dynamic Impedance
Ppk, PEAK POWER (kW)
tr≤ 10 ms
IT, TEST CURRENT (AMPS)
UL RECOGNITION
The entire series has Underwriters Laboratory
Recognition for the classification of protectors (QVGV2)
under the UL standard for safety 497B and File #E210057.
Many competitors only have one or two devices recognized
or have recognition in a non-protective category. Some
competitors have no recognition at all. With the UL497B
recognition, our parts successfully passed several tests
including Strike Voltage Breakdown test, Endurance
Conditioning, Temperature test, Dielectric Voltage-Withstand
test, Discharge test and several more.
Whereas, some competitors have only passed a
flammability test for the package material, we have been
recognized for much more to be included in their Protector
category.
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APPLICATION NOTES
RESPONSE TIME
In most applications, the transient suppressor device is
placed in parallel with the equipment or component to be
protected. In this situation, there is a time delay associated
with the capacitance of the device and an overshoot
condition associated with the inductance of the device and
the inductance of the connection method. The capacitive
effect is of minor importance in the parallel protection
scheme because it only produces a time delay in the
transition from the operating voltage to the clamp voltage as
shown in Figure 5.
The inductive effects in the device are due to actual
turn-on time (time required for the device to go from zero
current to full current) and lead inductance. This inductive
effect produces an overshoot in the voltage across the
equipment or component being protected as shown in
Figure 6. Minimizing this overshoot is very important in the
application, since the main purpose for adding a transient
suppressor is t o clamp voltage spikes. The SMC series have
a very good response time, typically < 1.0 ns and negligible
inductance. However, external inductive effects could
produce unacceptable overshoot. Proper circuit layout,
minimum lead lengths and placing the suppressor device as
close as possible to the equipment or components to be
protected will minimize this overshoot.
Some input impedance represented by Zin is essential to
prevent overstress of the protection device. This impedance
should be as high as possible, without restricting the circuit
operation.
DUTY CYCLE DERATING
The data of Figure 1 applies for non-repetitive conditions
and at a lead temperature of 25°C. If the duty cycle increases,
the peak power must be reduced as indicated by the curves
of Figure 7. Average power must be derated as the lead or
ambient temperature rises above 25°C. The average power
derating curve normally given on data sheets may be
normalized and used for this purpose.
At first glance the derating curves of Figure 7 appear to be
in error as the 10 ms pulse has a higher derating factor than
the 10 ms pulse. However, when the derating factor for a
given pulse of Figure 7 is multiplied by the peak power value
of Figure 1 for the same pulse, the results follow the
expected trend.
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VL
V
Vin
Vin (TRANSIENT) VL
td
V
Vin (TRANSIENT)
OVERSHOOT DUE TO
INDUCTIVE EFFECTS
tD = TIME DELAY DUE TO CAPACITIVE EFFECT
t t
Figure 5. Figure 6.
Figure 7. Typical Derating Factor for Duty Cycle
DERATING FACTOR
1 ms
10 ms
1
0.7
0.5
0.3
0.05
0.1
0.2
0.01
0.02
0.03
0.07
100 ms
0.1 0.2 0.5 2 5 10 501 20 100
D, DUTY CYCLE (%)
PULSE WIDTH
10 ms
TYPICAL PROTECTION CIRCUIT
Vin VL
Zin
LOAD
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7
PACKAGE DIMENSIONS
SMC
CASE 403−03
ISSUE E
DIM
AMIN NOM MAX MIN
MILLIMETERS
1.90 2.13 2.41 0.075
INCHES
A1 0.05 0.10 0.15 0.002
b2.92 3.00 3.07 0.115
c0.15 0.23 0.30 0.006
D5.59 5.84 6.10 0.220
E6.60 6.86 7.11 0.260
L0.76 1.02 1.27 0.030
0.084 0.095
0.004 0.006
0.118 0.121
0.009 0.012
0.230 0.240
0.270 0.280
0.040 0.050
NOM MAX
7.75 7.94 8.13 0.305 0.313 0.320
HE
E
bD
c
L1L A1
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P.
4. 403−01 THRU −02 OBSOLETE, NEW STANDARD 403−03.
HE
0.020 REF
0.51 REF
L1
4.343
0.171
3.810
0.150
2.794
0.110 ǒmm
inchesǓ
SCALE 4:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its of ficers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
1.5SMC6.8AT3/D
Surmetic is a trademark of Semiconductor Components Industries, LLC.
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