MC74LVX14 Hex Schmitt Inverter With 5 V-Tolerant Inputs The MC74LVX14 is an advanced high speed CMOS Schmitt inverter. The inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V systems. The MC74LVX14 is pin and functionally compatible to the MC74LVX04, but the inputs have hysteresis and, with its Schmitt trigger function, can be used as a line receiver which will receive slow input signals. Features * * * * * * * * * http://onsemi.com MARKING DIAGRAMS 14 SOIC-14 D SUFFIX CASE 751A 14 High Speed: tPD = 6.8 ns (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 2 mA (Max) at TA = 25C Powerdown Protection Provided on Inputs Balanced Propagation Delays Low Noise: VOLP = 0.5 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V These Devices are Pb-Free and are RoHS Compliant 1 LVX14G AWLYWW 1 14 14 1 TSSOP-14 DT SUFFIX CASE 948G 1 LVX 14 ALYWG G 14 14 1 LVX14 ALYWG SOEIAJ-14 M SUFFIX CASE 965 1 LVX14 = Specific Device Code A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. (c) Semiconductor Components Industries, LLC, 2011 May, 2011 - Rev. 5 1 Publication Order Number: MC74LVX14/D MC74LVX14 VCC A5 O5 A4 O4 A3 O3 14 13 12 11 10 9 8 PIN NAMES Pins An On 1 2 3 4 5 6 7 A0 O0 A1 O1 A2 O2 GND Function Data Inputs Data Outputs Figure 1. 14-Lead Pinout (Top View) A0 A1 A2 A3 A4 A5 1 2 3 4 5 6 9 8 11 10 13 12 O0 FUNCTION TABLE O1 An On O2 L H H L O3 O4 O5 Figure 2. Logic Diagram ORDERING INFORMATION Package Shipping SOIC-14 (Pb-Free) 2500 Tape & Reel MC74LVX14DTR2G TSSOP-14* 2500 Tape & Reel MC74LVX14MG SOEIAJ-14 (Pb-Free) 50 Units / Rail MC74LVX14MELG SOEIAJ-14 (Pb-Free) 2000 Tape & Reel Device MC74LVX14DR2G For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. http://onsemi.com 2 MC74LVX14 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage -0.5 to +7.0 V Vin DC Input Voltage -0.5 to +7.0 V Vout DC Output Voltage -0.5 to VCC +0.5 V IIK Input Diode Current -20 mA IOK Output Diode Current 20 mA Iout DC Output Current, per Pin 25 mA ICC DC Supply Current, VCC and GND Pins 50 mA PD Power Dissipation 180 mW Tstg Storage Temperature -65 to +150 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIII IIIIII IIIIIIIII IIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIII IIIIII III III III II IIII III III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIII IIIIII IIIIIIIII IIIIII IIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIII IIIIII IIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage Vin DC Input Voltage Vout DC Output Voltage TA Operating Temperature, All Package Types Min Max Unit 2.0 3.6 V 0 5.5 V 0 VCC V -40 +85 C DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions VCC V TA = 25C Min VT+ Positive Threshold Voltage (Figure 5) 3.0 VT- Negative Threshold Voltage (Figure 5) 3.0 0.90 VH Hysteresis Voltage (Figure 5) 3.0 0.30 VOH High-Level Output Voltage (Vin = VIH or VIL) IOH = -50 mA IOH = -50 mA IOH = -4 mA 2.0 3.0 3.0 1.9 2.9 2.58 VOL Low-Level Output Voltage (Vin = VIH or VIL) IOL = 50 mA IOL = 50 mA IOL = 4 mA 2.0 3.0 3.0 Iin Input Leakage Current Vin = 5.5 V or GND ICC Quiescent Supply Current Vin = VCC or GND Typ TA = -40 to 85C Max Min 2.20 Max Unit 2.20 V 0.90 1.20 2.0 3.0 0.0 0.0 0.30 V 1.20 1.9 2.9 2.48 V V 0.1 0.1 0.36 0.1 0.1 0.44 V 3.6 0.1 1.0 mA 3.6 2.0 20.0 mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) TA = 25C Symbol Parameter tPLH, tPHL Propagation Delay, Input-to-Output tOSHL tOSLH Test Conditions Output-to-Output Skew (Note 1) Min TA = -40 to 85C Typ Max Min Max Unit ns VCC = 2.7 V CL = 15 pF CL = 50 pF 8.7 11.2 16.3 19.8 1.0 1.0 19.5 23.0 VCC = 3.3 0.3 V CL = 15 pF CL = 50 pF 6.8 9.3 10.6 14.1 1.0 1.0 12.5 16.0 VCC = 2.7 V VCC = 3.3 0.3 V CL = 50 pF CL = 50 pF 1.5 1.5 1.5 1.5 ns 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design. CAPACITIVE CHARACTERISTICS TA = 25C Symbol Min Parameter TA = -40 to 85C Typ Max 10 Cin Input Capacitance 4 CPD Power Dissipation Capacitance (Note 2) 21 Min Max Unit 10 pF pF 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 6 (per buffer). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 MC74LVX14 NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V, Measured in SOIC Package) TA = 25C Symbol Typ Characteristic Max Unit VOLP Quiet Output Maximum Dynamic VOL 0.3 0.5 V VOLV Quiet Output Minimum Dynamic VOL -0.3 -0.5 V VIHD Minimum High Level Dynamic Input Voltage 2.0 V VILD Maximum Low Level Dynamic Input Voltage 0.9 V TEST POINT VCC A OUTPUT 50% DEVICE UNDER TEST GND tPLH O tPHL CL* 50% VCC *Includes all probe and jig capacitance VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS Figure 3. Switching Waveforms Figure 4. Test Circuit 4 3 (VT+) 2 VHtyp (VT-) 1 2 3 2.5 3.5 3.6 VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT+ typ) - (VT- typ) Figure 5. Typical Input Threshold, VT+, VT- versus Power Supply Voltage VH Vin VCC VCC VH VT+ VT- VT+ VT- Vin GND GND VOH VOH Vout Vout VOL VOL (a) A Schmitt-Trigger Squares Up Inputs With Slow Rise and Fall Times (b) A Schmitt-Trigger Offers Maximum Noise Immunity Figure 6. Typical Schmitt-Trigger Applications http://onsemi.com 4 MC74LVX14 PACKAGE DIMENSIONS SOIC-14 D SUFFIX CASE 751A-03 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. -A- 14 8 -B- P 7 PL 0.25 (0.010) B M 7 1 G -T- D 14 PL 0.25 (0.010) T B S A DIM A B C D F G J K M P R J M K M F R X 45 _ C SEATING PLANE M S SOLDERING FOOTPRINT 7X 7.04 14X 1.52 1 14X 0.58 1.27 PITCH DIMENSIONS: MILLIMETERS http://onsemi.com 5 MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 MC74LVX14 PACKAGE DIMENSIONS TSSOP-14 DT SUFFIX CASE 948G-01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S N 2X 14 L/2 0.25 (0.010) 8 M B -U- L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S S DETAIL E K A -V- EEE CCC CCC EEE K1 J J1 SECTION N-N -W- C 0.10 (0.004) -T- SEATING PLANE D H G DETAIL E DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS http://onsemi.com 6 INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ MC74LVX14 PACKAGE DIMENSIONS SOEIAJ-14 CASE 965-01 ISSUE B 14 LE 8 Q1 E HE M_ L 7 1 DETAIL P Z D VIEW P A e DIM A A1 b c D E e HE L LE M Q1 Z A1 b 0.13 (0.005) c M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). 0.10 (0.004) MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --1.42 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.056 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 http://onsemi.com 7 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC74LVX14/D